51698 news 1265752011 1475895908 <![CDATA[Seven Computing Papers Accepted To MICRO]]> (August 21, 2006)--Faculty and students from the College's Computing Science and Systems (CSS) division, the Center for Experimental Research in Computer Systems (CERCS), and Georgia Tech’s School of Electrical and Computer Engineering (ECE) have had an unprecedented seven papers accepted to the 2006 International Symposium on Microarchitecture (MICRO). MICRO is one of the premiere conferences for academic and industrial researchers in computer architecture and compiler-microarchitecture interaction. With only a 24% acceptance rate, the seven papers account for a dominating one-sixth of the 42 papers accepted to MICRO this year.

The seven accepted papers address issues such as traditional high-performance processor design, hardware support for security, hardware-compiler cooperation, and the impact of emerging technologies on microprocessors. This wide range of topics showcases the large variety of high-impact computer architecture and compiler research being conducted at Georgia Tech and our success within the computer architecture community. Congratulations to the following Computing faculty and students: Associate Professor Santosh Pande, Assistant Professor Hsien-Hsin "Sean" Lee, Assistant Professor Sung Kyu Lim, Assistant Professor Gabriel Loh, Assistant Professor Yannis Smaragdakis, graduate students Michael Healy, Fayez Mohamood, Weidong Shi, Samantika Subramaniam, Ranjith Subramanian, Kun Zhang, Tao Zhang, and Xiaotong Zhuang. Accepted papers include:

Title: Die Stacking (3D) Microarchitecture
Authors: Murali M. Annavaram, Bryan Black, Edward Brekelbaum, John DeVale, Gabriel H. Loh, Don McCauley, Pat Morrow, Don Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadas Shankar, John Paul Shen, Clair Webb

Title: A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable 2D and 3D Microprocessors
Authors: Fayez Mohamood, Michael Healy, Sung Kyu Lim, Hsien-Hsin S. Lee

Title: Authentication Control Point and its Implications for Secure Processor Design
Authors: Weidong Shi, Hsien-Hsin S. Lee

Title: Fire-and-Forget: Load/Store Scheduling with No Store Queue at All
Authors: Samantika Subramaniam, Gabriel H. Loh

Title: Adaptive Caches: Effective Shaping of Cache Behavior to Workloads
Authors: Ranjith Subramanian, Yannis Smaragdakis, Gabriel H. Loh

Title: Memory Protection through Dynamic Access Control
Authors: Kun Zhang, Tao Zhang, Santosh Pande

Title: Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection
Authors: Xiaotong Zhuang, Tao Zhang, Santosh Pande

For more information about MICRO 2006, click here.

]]> 2006-08-22T00:00:00-04:00 The College's Computing Science and Systems (CSS) division and the Center for Experimental Research in Computer Systems (CERCS) set a precedent at the 2006 International Symposium on Microarchitecture.

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