FIFA President Gianni Infantino likened the scale of each game to that of a Super Bowl. The success of a tournament that large will rely heavily on technology, affecting everything from the players on the pitch, all the way to viewers at home.

On top of the state-of-the-art technology used at many large events, this World Cup will also see the debut of new technology. At the center of much of it will be electrical and computer engineering.

Experts from the Georgia Tech School of Electrical and Computer Engineering (ECE) weigh in on how the field is enabling the technology behind the world’s largest sporting event.

Read Full Story on the ECE News Page

They’re in our TVs, refrigerators, and washing machines, helping us live comfortable lives. They also help us stay alive as part of the medical network, used in pacemakers, blood pressure monitors, and MRI machines, among other things. Also, our national economic and defense systems rely on them. Basically, semiconductors control and manage the flow of information in the machinery that keeps the world going.

And right now, at Georgia Tech, researchers are working to innovate chip technology to ensure that U.S. semiconductor development is globally competitive, reliable, sustainable, and resilient, today and in the future.

“If you look at semiconductors, or the whole area of computing, it spans across Georgia Tech — across many different schools and disciplines,” said Arijit Raychudhury, professor and Steve W. Chaddick Chair in the School of Electrical and Computer Engineering (ECE). “Starting with physics and chemistry, where we essentially learn how different types of materials will react, to materials science and engineering, to electrical engineering and computer engineering, to computer science.”

It's a diverse, multidisciplinary enterprise from bottom to top, Raychudhury noted. And there is still plenty of room at the bottom, as theoretical physicist Richard P. Feynman famously said more than 60 years ago, predicting that one day we’d be making things at the atomic level. We are. It’s a familiar realm to Victor Fung and his lab, where they are designing new materials for semiconductors from the ground up, atom by atom.

“We are interested in exploring how to translate the latest advances in AI and machine learning to aid in accelerating computational materials simulations and materials discovery,” said Fung, assistant professor in the School of Computational Science. “We’ve been developing methods which can accurately predict a wide range of materials’ properties, to greatly facilitate high-throughput materials screening.”

Fung’s lab is using AI to discover previously unstudied materials with the electronic properties to build into chips. This approach to creating “designer” semiconductors would be significantly faster and cover more of the materials space than current methods.

Improving the Landscape

Smaller, more efficient, and more powerful are all part of the constantly evolving landscape in semiconductor research and development. It’s a very expensive landscape. While many chips are about the size of a fingernail, they are among the most complex human-made objects on Earth. Just building a semiconductor fabrication factory costs billions of dollars.

For a chemical engineer like Michael Filler, that sounds like opportunity.

“Chemical engineers think about how we produce products on a massive scale,” said Filler, associate professor in the School of Chemical and Biomolecular Engineering and associate director of the Institute for Electronics and Nanotechnology (IEN).

Filler, whose research involves the growing of semiconductor components, like transistors, from seed particles, is aiming to help democratize the process of chip development, bringing down the cost substantially while maintaining performance. In a not too distant future, that could mean an individual at home printing a chip on a machine similar to a 3D printer.

“Imagine a laser printer that can literally spit out custom electronics in a matter of minutes,” Filler said. “We’re big believers in the individual’s ability to be creative and know what they want to build for their applications. Ultimately, we’re interested in giving makers and prototypers opportunities to customize electronics.”

He’s in the right place for the far-reaching research he has in mind, adding, “We are so blessed with great facilities at Georgia Tech. It would be hard to imagine working somewhere else, because very few places have the diversity and quality of tooling we have here.”

IEN, which facilitates much of the semiconductor research at Georgia Tech, is based in the Marcus Nanotechnology Building, with its state-of-the-art micro/nano fabrication facilities such as the shared cleanroom space and a laser machine lab for micromachining.

But it is the range of expertise and creativity among faculty and students who are making IEN and Georgia Tech a thought leader in semiconductor research. This is evidenced by Tech’s recent grant of $65.7 million from the Semiconductor Research Corporation and the Defense Research Projects Agency to launch two new interdisciplinary research centers.

Events like Georgia Tech Chip Day (May 2) and Nanowire Week, an international gathering happening in Atlanta in October, also speak to Tech’s growing influence in this area.

Answering the Call

The Covid-19 pandemic clarified just how difficult it can be to make more chips. A shortage of semiconductors affected the supply of phones, computers, and other commonly used items during the global shutdown. Increased demand, depleted reserves, and too few manufacturing plants and workers significantly crippled the supply chain.

“The high degree of geographic concentration in certain parts of the semiconductor supply chain has recently created a heightened risk of supply interruptions,” said Chip White, Schneider National Chair in Transportation and Logistics and professor in the H. Milton Stewart School of Industrial and Systems Engineering (ISyE). “Such interruptions and resulting wild fluctuations in semiconductor demand can threaten the nation’s public health, defense, and economic security.”

With that in mind, translational supply chain research is going on in several places on campus, White said, including the Supply Chain and Logistics Institute and the NSF AI Research Institute for Advances in Optimization. White and his colleagues are developing software platforms for stress testing manufacturing supply chains. The goal is to identify vulnerabilities and risk mitigation procedures to design and operate next generation supply chains for critical industries such as the semiconductor industry, to improve global competitiveness and strike a balance between market forces and national security.

In an effort to address and feed the next generation demand for chips, the Biden administration recently launched a massive effort to outcompete China in semiconductor manufacturing, offering $39 billion in funding incentives for companies seeking to build plants in the U.S.

Another related area of importance in the ongoing development of semiconductors is growing the workforce of the future, and that includes a new wave of researchers. This is a role that Jennifer Hasler takes seriously.

“I have a strong interest and belief in mentoring,” said Hasler, ECE professor and founder of the Integrated Computational Electronics lab at Georgia Tech. She’s proven, theoretically at least, that the technology already exists to build a silicon-based version of the human cerebral cortex (which would cost billions of dollars to design and build), but one of her favorite roles is working with new, young faculty.

“It’s a personal thing for me, but it’s one of the coolest things I’m involved in,” she said. “When they come to Georgia Tech, they see how big this place is, bigger than a company. I like to say to them, ‘Let’s calm down, take a breath, you’re good, so let’s go make some cool stuff. Let’s get some momentum going.’”

For Raychowdhury, director of the new Center for the Co-Design of Cognitive Systems (part of the JUMP 2.0 program), developing the skilled workforce of the future means answering the call of the nation.

“This is one of the largest ECE departments in the country, with many, many talented students,” he said. “And given the need and shortage of skilled professionals in this particular area, I think it’s critical for us to create that kind of pipeline.” Last year, ECE undergraduate students started taking a new, two-semester course, sponsored by Apple, in which they actually build microprocessors from scratch.

“This is completely new,” Raychowdhury said. “It’s expensive to offer this course, but we plan to keep doing it and we’re in conversations with other companies that want to invest in workforce development. So, in addition to doing fantastic research, we want to be sensitive to the needs of the country and a new generation.”

Traditional sleep monitoring systems often rely on bulky equipment and nasal cannulas — small tubes inserted into the nostrils to measure airflow. While effective, these systems can be uncomfortable, intrusive, and difficult to tolerate overnight, limiting their use for long-term monitoring at home.

Now, researchers led by W. Hong Yeo, Peterson Professor in Pediatric Research at the George W. Woodruff School of Mechanical Engineering, have developed a soft, wireless nasal patch that could offer a more comfortable alternative for monitoring breathing during sleep.

The technology, described in a recent study published in Proceedings of the National Academy of Sciences (PNAS), uses ultrathin, skin-like wearable electronics to detect subtle movements of the nose caused by breathing without tubes, wires, or direct airflow measurements.

Read the full story on the George W. Woodruff School of Mechanical Engineering website.

Each week on his way to the Howey Physics Building, Harrington passed the MiRC, wondering what happened behind its doors. 

“One day I got the courage to walk in. I went to the front desk and I asked, ‘Hey, do you have any jobs for freshmen?’” Harrington recalled. “I was pointed to Bob Rose, so I walked down and had a brief conversation with him where he hired me on the spot.”

That moment—walking in with curiosity and leaving with a job— shifted Harrington’s career path from pursuing a bachelor’s degree in computer engineering and working in electronic design automation (EDA) to a life in the laboratory advancing microelectronics research. 

When he began working for the MiRC in the early 2000s, the cleanroom facilities had only three full-time employees. The small staff gave Harrington opportunities to contribute. He started with smaller tasks, from changing pump oil to sorting nuts and bolts, but his dedication quickly led to greater responsibility. 

At the time, Gary Spinner, director of cleanroom operations for the Institute for Matter and Systems (IMS), played a key role in mentoring students and expanding access to the Institute’s microelectronics facilities. Known for his hands-on approach and commitment to student development, Spinner helped guide the growth of cleanroom operations and the people who worked within them.

“Gary took note of me and said, ‘Brandon, please join the co-op program,’” Harrington said. “I quickly found my way into the cleanrooms, and from that point on, I touched basically every system, whether it was the billing software, the access control system, or the toxic gas monitoring.”

As an undergraduate co-op, Harrington advanced through the MiRC, training graduate researchers on tools and developing new or modifying existing efficiency systems. By the time he earned his undergraduate degree, he had accumulated extensive experience in the cleanrooms and graduated with an offer to be a full-time electrical engineer for the MiRC while pursuing his master’s degree.

An unexpected outcome of this role was a friendship that led him to a Ph.D. in electrical engineering. While working full-time, Harrington became good friends with then-Ph.D. student Reza Abdolvand. After Abdolvand joined Oklahoma State University as a faculty member, he asked Harrington if he would come help him start his research group.

“I was really good friends with Reza and I thought this was a way I could get his career going,” Harrington said. “So I left Georgia Tech, around 2008, to pursue my PhD from Oklahoma State.”

Today, Harrington supports the industry in a variety of ways, providing consultation for startups and large corporations alike. His work includes early feasibility studies, prototype development, productization, transfer to volume-production foundries, and yield improvement activities. 

He is now the director of microelectromechanical systems (MEMS) development at AMFitzgerald, where he leads a team delivering innovative solutions to clients—all because he followed his curiosity.

Harrington’s journey reflects the broader impact of Georgia Tech’s cleanroom facilities—spaces where curiosity can turn into hands-on experience, mentorship, and career-defining opportunities. By providing students access to advanced tools, real-world problem-solving, and a collaborative research environment, the cleanrooms continue to shape the next generation of engineers and innovators, just as they did for a curious freshman who decided to walk through an open door.

More than 300 leaders from industry, government, and academia gathered on Georgia Tech’s campus for Energy Day, a one-day conference focused on one of today’s most urgent challenges: meeting the rapidly growing energy demands of artificial intelligence (AI).  

The partnership has driven progress in areas ranging from hypersonics to bioscience, while also deepening institutional ties beyond research. Joint faculty appointments — such as Anirban Mazumdar, who holds roles at both Sandia and the George W. Woodruff School of Mechanical Engineering — demonstrate how closely the organizations work together. The collaboration has also expanded student talent pipelines, providing more avenues for Georgia Tech students to pursue careers at the national lab.

“At its core, this partnership is about people,” said Tim Lieuwen, executive vice president for Research at Georgia Tech. “Sandia and Georgia Tech share a commitment to discovery and developing the talent, creativity, and collaboration our nation needs.”

The renewed MOU, he said, “strengthens connections between our researchers, opens new doors for our students, and builds meaningful career pathways into national service. When our communities work together to address national priorities, we not only accelerate technological advances — we expand opportunities for the people who will shape the future of our nation’s security.”

Under the new MOU, Sandia and Georgia Tech will focus on integrated research across key national security‑aligned areas, including secure artificial intelligence and computing, quantum technologies, critical minerals, advanced manufacturing, energy and grid resilience, and hypersonics. The partnership emphasizes connecting manufacturing, computation, and systems approaches directly to national security applications.

“Together, we have been solving new and unprecedented challenges in science and engineering, and now we have a great opportunity to develop this partnership,” said Dan Sinars, Sandia’s deputy chief research officer. “Our research benefits both national security and national prosperity, and keeps the country at the forefront of the world.”

With this strengthened connection, the partners aim to grow their shared research footprint through increased funding, publications, and faculty-led startups. Over the long term, Georgia Tech intends to become one of Sandia’s top hiring pipelines, ensuring that talent developed through joint research continues into national security careers.

History of the Partnership

The Institute’s collaboration with Sandia began in the mid‑2010s, when the labs selected Georgia Tech as one of its partner institutions. The first MOU, signed in 2015, formalized the relationship and outlined initial technical focus areas. 

In 2018, George White, executive director of strategic partnerships, and Olof Westerstahl,  senior director strategic initiatives in the Office of Corporate Engagement, helped expand the partnership. They launched “Sandia Day,” an event designed to introduce Georgia Tech faculty to Sandia researchers and spark new collaborations. By 2020, the organizations signed a second MOU that expanded the partnership’s technical focus areas to include energy and grid security, materials and nanotechnology, advanced electronics, advanced manufacturing, advanced computing, cyber and information security, bioscience, hypersonics, quantum information science, and engineering sciences.

The results have been substantial. Since 2018, Sandia has sponsored $35 million in research collaborations with Georgia Tech. Researchers from both institutions have co-authored 450 publications since 2016. Research activity continues to accelerate, with $1.6 million in new contracts in the past year alone. As of August 2025, Sandia employs 325 Georgia Tech alumni — a testament to the impact of the growing talent pipeline.

“We view our work with Sandia as the model for engagement with other national labs,” said White. “With the new MOU, we will continue to grow the Sandia partnership. I would like to see our footprint double in scope in the next five years.”

Some labs in the School of Electrical and Computer Engineering (ECE) use liquid nitrogen and liquid helium to chill cryogenic test systems to as low as 4 Kelvins (K), or -452.47 degrees Fahrenheit (F), temperatures that rival the coldest regions of deep space.

At this point, materials and electronic devices stop behaving in familiar ways, which is exactly why ECE researchers use these extreme conditions to explore and develop new semiconductor technologies.

“Electronics are very temperature dependent,” Professor John Cressler said, whose lab houses some of these cryogenic test systems. “Whether you see it or not, every electronic you buy has a tested temperature spec associated with it.”

Current commercially sold devices, including most cell phones, are made to run between 32 F and 85 F. Researchers in ECE test across a far wider range, as they develop technology with extraterrestrial and quantum computing applications in mind.

Other ECE teams work in natural extremes, carrying instruments into polar regions where cold creates challenges that no lab can fully replicate.

Just as cold pushes athletes in different ways, it guides ECE research down its own distinct paths.

Read the full story on the School of Electrical and Computer Engineering's website.

Diabetic foot ulcers, for example, are slow to heal and can increase the risk of infection, hospitalization, and even amputation. 

To address this critical challenge, researchers at the Georgia Institute of Technology (Georgia Tech) and the Georgia Tech Research Institute (GTRI) have developed a sensor designed to monitor chronic wounds in real-time. Embedded directly into a bandage, this flexible, low-cost device could transform wound management for diabetic patients and other critical applications — such as providing direct treatment to soldiers on the battlefield or managing chronic wounds in elderly populations and patients with limited healthcare access — by reducing invasive bandage changes and ensuring timely medical intervention.

“For diabetic patients with foot ulcers, long-term monitoring and care are essential,” said GTRI Principal Research Engineer and Project Lead Judy Song. “We were inspired by the success of wearable glucose monitors to develop a compact, affordable sensor tailored to wound care.”  

This project was supported by GTRI’s Independent Research and Development (IRAD) program between 2022-2025 and reflects the strength of interdisciplinary collaboration across Georgia Tech. Researchers from three out of GTRI’s eight laboratories developed the sensor with experts from the George W. Woodruff School of Mechanical Engineering, the H. Milton Stewart School of Industrial and Systems Engineering and the Wallace H. Coulter Department of Biomedical Engineering at Tech and Emory University.

About one in four people with diabetes will develop a foot ulcer at some point in their lives, making it one of the leading causes of foot amputations. For these patients, nerve damage and poor blood flow hinder the body’s natural healing process and allow wounds to linger and worsen. 

During the initial phases of their research, the team noted that nitric oxide (NO) had been previously identified as a key biomarker for wound health due to its central role in the healing process. Nitric oxide improves blood flow, reduces inflammation, promotes tissue growth and fights infection. By tracking nitric oxide levels in wounds, clinicians could determine whether a wound is improving or detect early signs of trouble. 

"Nitric oxide plays a fascinating, almost paradoxical, role in wound healing,” said GTRI Senior Research Engineer Victoria Razin, who is co-leading the project. “It’s essential for processes like blood flow and tissue repair, but can also signal when something is going wrong.”

At the core of the smart bandage is a flexible sensor powered by a three-electrode system capable of detecting changes in nitric oxide. The team used advanced Aerosol Jet® printing techniques to fabricate the sensor, significantly reducing production costs from thousands of dollars to just a few dollars per unit and making the design more affordable and scalable.

“Typically, prototyping these sensors can cost thousands of dollars, but our approach brought costs down dramatically,” said Chuck Zhang, the Eugene C. Gwaltney, Jr. Chair and Professor in ISYE and a program director at the National Science Foundation (NSF), who oversaw sensor fabrication for this project. “Lower costs let us iterate quickly and deliver something that could have real healthcare impact.”

To test the sensor’s accuracy, the team conducted extensive laboratory studies in both biological and simulated wound conditions. 

In one set of experiments, endothelial cell cultures were used to create “wounds” by scraping the cell layers. As the cells migrated to repair the gap, nitric oxide production increased, and the sensor successfully tracked these changes in real-time. Additional fluid tests using blood plasma and red blood cells demonstrated that the sensor could reliably detect nitric oxide in a variety of conditions that closely mimic real-world wound environments.

These experiments confirmed that the sensor can identify the fluctuations in nitric oxide associated with different phases of wound healing. 

Lab testing was led by Dr. Wilbur Lam, a professor in the Department of Biomedical Engineering and at Emory University School of Medicine, with support from Kirby Fibben, a biomedical engineering Ph.D. student at Tech. 

"There’s a significant clinical need for real time, minimally invasive sensor technologies that detect nitric oxide,” said Dr. Lam. “While we’re starting with wound healing, there’s multiple other applications for vascular, hematologic, and pulmonary diseases as well.” 

The next step in the project is integrating the sensor into a functional wearable device. The team is combining the sensor with a miniaturized potentiostat (MicroPS) – a small electronic device that measures chemical signals – along with flexible electronic components and a system to transmit data to a mobile app. 

The MicroPS, designed by the GTRI research team, led by GTRI Research Engineer Curtis Mulady, enables compact electrochemical measurements and the wireless platform transmits nitric oxide readings from the bandage to a mobile app via Bluetooth. The app uploads the data to a cloud platform, giving clinicians the ability to remotely monitor wound progress in real time. This system could reduce the need for frequent in-person checkups, enabling earlier interventions and improving outcomes for patients.

Future iterations of the bandage aim to include “closed-loop” systems capable of both monitoring and treating wounds, said GTRI’s Song. For example, sensors could trigger a response, like releasing therapeutic agents or antimicrobials directly to the wound, when abnormalities are detected.

The researchers are also exploring commercialization pathways, including partnerships with medical device companies or the formation of a startup. 

“This sensor meets a real need for early detection of infection and to evaluate wound healing, and I believe it could have significant commercial success,” said Peter Hesketh, a professor in the School of Mechanical Engineering who led sensor design and performance testing. 

Other contributors to this project from GTRI include Mulady, Cora Weidner, Maxwell Blanchard, Rachel Erbrick and Christopher Heist. Zhaonan “Zeke” Liu, a postdoctoral fellow in ISYE, assisted with sensor fabrication, while Rizky Ilhamsyah, a graduate research assistant in the School of Mechanical Engineering, contributed to sensor design and performance testing. 

Writer: Anna Akins 
Photos: Sean McNeil 
GTRI Communications
Georgia Tech Research Institute
Atlanta, Georgia USA

For more information, please contact gtri.media@gtri.gatech.edu. 

To learn more about GTRI, visit: Georgia Tech Research Institute | GTRI

University research drives U.S. innovation, and Georgia Institute of Technology is leading the way.  

Workshops hosted by the Robert C. Williams Museum of Papermaking and led by Georgia Tech Assistant Professor HyunJoo Oh will introduce about 60 students from Atlanta Public Schools to paper-based electronics through hands-on workshops.

The Williams Museum will open an exhibit titled “The Future of Paper” that displays designs created in the workshop alongside visionary examples of paper-based technologies from Georgia Tech researchers.

The exhibit, funded by the National Science Foundation, is slated to open to the public in 2027.

Oh is a researcher with joint appointments in the School of Interactive Computing and the School of Industrial Design.She leads the Computational Design and Craft (CoDe Craft) Group at Georgia Tech, where her team integrates everyday craft materials with computing to support creative exploration.

Oh believes paper could be widely used to support prototyping printed circuit boards (PCBs) as a sustainable alternative to silicon. While silicon is the most prominent material used by technology companies to build computer chips, it isn’t biodegradable. And it can be harmful to the environment and contribute to e-waste. 

Paper, however, provides an eco-friendly platform for printing conductive traces and mounting small electronic components. With the expansion of printed electronic tools and techniques, paper and similar materials have become more popular among technologists who develop sensing technologies and wearable devices.

“It’s widely available and accessible,” Oh said. “I can’t think of anything more affordable and approachable that young makers and the broader maker community can use for circuits than paper.

“Printed electronics traditionally required expensive equipment, but with recent innovation in materials science, conductive materials such as conductive pens and paint available in local arts and crafts stores can be used to build circuits on paper. We can also print circuits using a regular office inkjet printer with silver ink.”

Shared Vision

Shortly after arriving at Georgia Tech in 2019, Oh knew she had to develop a project that would let her partner with the Williams Museum. 

“I was captivated by the museum’s space and its celebration of paper,” she said. “I wanted a collaboration that would integrate technology in a way that complemented and respected the museum’s existing beauty.”

Museum director Virginia Howell said the project was a perfect match for the museum, which has documented the history of papermaking since it was founded in 1939 by the Massachusetts Institute of Technology. Georgia Tech became the new home of the museum in 2003.

With more than 100,000 objects in its collection — some dating back as far as 2,000 years ago — the museum is unique, Howell said. Most papermaking museums are typically located at an historic mill, but the Williams Museum covers the history of papermaking.

Howell said that before she met Oh, she had been looking for an exhibit that would display the possible future of papermaking.

“We do the past of paper fantastically well, and we do the present of paper well through our changing exhibitions,” Howell said. “The future of paper is something we haven’t spent a lot of time interpreting.”

Crafting the Future

Oh and Howell agree that young people will shape that future. Oh said paper is commonly linked to art in the education sphere. As the material’s use in technology increases, however, it can funnel the interests of students toward engineering and computing. 

Incorporating paper and craft materials can invite more students to explore engineering and computing concepts. After all, a circuit board created on paper isn’t so different from one built on a silicon PCB, Oh said.

“This approach can excite the kind of students who usually feel disconnected from electronics and computing,” she said. “It gives those who only see themselves as creative or artistic a way to enjoy technology and resonate with it.

“Usually when I work with young students, especially girls, if I start with something technical, their interest wanes. But when I present those same ideas through art using familiar materials like paper, they become more engaged and confident. That’s when they start to flourish.”

Oh and Howell will hold three rounds of 10-week workshops for the students — spring 2026, fall 2026, and spring 2027. The best designs from those workshops will be displayed in the exhibit.

“They’ll feel more comfortable with computing and engineering as an introductory experience,” Howell said. “When they successfully build on it and realize they did this on a sheet of paper, it’s exciting to think what they’ll do when they get more sophisticated tools and access.”

Georgia Institute of Technology has been ranked 7th in the world in the 2026 Times Higher Education Interdisciplinary Science Rankings, in association with Schmidt Science Fellows. This designation underscores Georgia Tech’s leadership in research that solves global challenges. 

Known as Advanced Phased Array Antenna Technology (APAT), the system uses Radio Frequency System on Chip (RFSoC) technology to process the signals directly on the antenna’s elements, allowing multiple signals to be tracked simultaneously in different directions. Both ground-based and airborne versions of the antenna technology have been built and tested for capturing the telemetry – data sent from the vehicles to monitor flight factors and conditions.
 

Built for the Pentagon’s Test Resource Management Center (TRMC), APAT uses commercial-off-the-shelf components paired with bespoke antenna elements and a custom system architecture to create a novel system with unparalleled operational flexibility. It is believed to be the largest all-digital antenna system ever designed by GTRI, which has been developing and building antennas for more than 25 years.
 

“We’re combining RF-efficient aperture design with an intelligently-selected RF front-end that goes directly to digital so that when they’re tracking these telemetry streams, they can track multiple streams simultaneously,” said Kevin Cook, a GTRI principal research engineer who is co-principal investigator on the project. “In earlier analog systems, you’d have to just pick a stream or split the array (or multiple arrays) and lose signal gain. But with digital, you can track as many streams as you want, limited only by the system’s processing power.”
 

Read more in the GTRI Newsroom

A new wearable electronic device that can be inserted inside any shoe may be able to address this challenge. The device, developed by Georgia Tech researchers, is made of more than 170 thin, flexible sensors that measure foot pressure — a key metric for determining whether someone is off-balance. The sensor collects pressure data, which the researchers could eventually use to predict which changes lead to falls.

The researchers presented their work in the paper, “Flexible Smart Insole and Plantar Pressure Monitoring Using Screen-Printed Nanomaterials and Piezoresistive Sensors.” It was the cover paper in the August edition of ACSApplied Materials & Interfaces. 

Pressure Points

Smart footwear isn’t new — but making it both functional and affordable has been nearly impossible. W. Hong Yeo’s lab has made its reputation on creating malleable medical devices. The researchers rely on the common commercial practice of screen-printing electronics to screen-print sensors. They realized they could apply this printing technique to address walking difficulties.

“Screen-printing is advantageous for developing medical devices because it's low-cost and scalable,” said Yeo, the Peterson Professor and Harris Saunders Jr. Professor in the George W. Woodruff School of Mechanical Engineering. “So, when it comes to thinking about commercialization and mass production, screen-printing is a really good platform because it's already been used in the electronics industry.”

Making the device accessible to the everyday user was paramount for Yeo’s team. A key innovation was making sure the wearable is thin enough to be comfortable for the wearer and easy to integrate with other assistive technologies. The device uses Bluetooth, enabling a smartphone to collect data and offer the future possibility of integrating with existing health monitoring applications.

Possibilities for real-world adaptation are promising, thanks to these innovations. Lightweight and small, the wearable could be paired with robotics devices to help stroke and Parkinson’s patients and the elderly walk. The high number of sensors could make it easier for researchers to apply a machine learning algorithm that could predict falls. The device could even enable professional athletes to analyze their performance.

Regardless of how the device is used, Yeo intends to keep its cost under $100. So far, with funding from the National Science Foundation, the researchers have tested the device on healthy subjects. They hope to expand the study to people with gait impairments and, eventually, make the device commercially available. 

“I'm trying to bridge the gap between the lack of available devices in hospitals or medical practices and the lab-scale devices,” Yeo said. “We want these devices to be ready now — not in 10 years.”

With its low-cost, wireless design and potential for real-time feedback, this smart insole could transform how we monitor and manage walking difficulties — not just in clinical settings, but in everyday life. 

Workshops hosted by the Robert C. Williams Museum of Papermaking and led by Georgia Tech Assistant Professor HyunJoo Oh will introduce about 60 students from Atlanta Public Schools to paper-based electronics through hands-on workshops.

The Williams Museum will open an exhibit titled “The Future of Paper” that displays designs created in the workshop alongside visionary examples of paper-based technologies from Georgia Tech researchers.

The exhibit, funded by the National Science Foundation, is slated to open to the public in 2027.

Oh is a researcher with joint appointments in the School of Interactive Computing and the School of Industrial Design.She leads the Computational Design and Craft (CoDe Craft) Group at Georgia Tech, where her team integrates everyday craft materials with computing to support creative exploration.

Oh believes paper could be widely used to support prototyping printed circuit boards (PCBs) as a sustainable alternative to silicon. While silicon is the most prominent material used by technology companies to build computer chips, it isn’t biodegradable. And it can be harmful to the environment and contribute to e-waste. 

Paper, however, provides an eco-friendly platform for printing conductive traces and mounting small electronic components. With the expansion of printed electronic tools and techniques, paper and similar materials have become more popular among technologists who develop sensing technologies and wearable devices.

“It’s widely available and accessible,” Oh said. “I can’t think of anything more affordable and approachable that young makers and the broader maker community can use for circuits than paper.

“Printed electronics traditionally required expensive equipment, but with recent innovation in materials science, conductive materials such as conductive pens and paint available in local arts and crafts stores can be used to build circuits on paper. We can also print circuits using a regular office inkjet printer with silver ink.”

Shared Vision

Shortly after arriving at Georgia Tech in 2019, Oh knew she had to develop a project that would let her partner with the Williams Museum. 

“I was captivated by the museum’s space and its celebration of paper,” she said. “I wanted a collaboration that would integrate technology in a way that complemented and respected the museum’s existing beauty.”

Museum director Virginia Howell said the project was a perfect match for the museum, which has documented the history of papermaking since it was founded in 1939 by the Massachusetts Institute of Technology. Georgia Tech became the new home of the museum in 2003.

With more than 100,000 objects in its collection — some dating back as far as 2,000 years ago — the museum is unique, Howell said. Most papermaking museums are typically located at an historic mill, but the Williams Museum covers the history of papermaking.

Howell said that before she met Oh, she had been looking for an exhibit that would display the possible future of papermaking.

“We do the past of paper fantastically well, and we do the present of paper well through our changing exhibitions,” Howell said. “The future of paper is something we haven’t spent a lot of time interpreting.”

Crafting the Future

Oh and Howell agree that young people will shape that future. Oh said paper is commonly linked to art in the education sphere. As the material’s use in technology increases, however, it can funnel the interests of students toward engineering and computing. 

Incorporating paper and craft materials can invite more students to explore engineering and computing concepts. After all, a circuit board created on paper isn’t so different from one built on a silicon PCB, Oh said.

“This approach can excite the kind of students who usually feel disconnected from electronics and computing,” she said. “It gives those who only see themselves as creative or artistic a way to enjoy technology and resonate with it.

“Usually when I work with young students, especially girls, if I start with something technical, their interest wanes. But when I present those same ideas through art using familiar materials like paper, they become more engaged and confident. That’s when they start to flourish.”

Oh and Howell will hold three rounds of 10-week workshops for the students — spring 2026, fall 2026, and spring 2027. The best designs from those workshops will be displayed in the exhibit.

“They’ll feel more comfortable with computing and engineering as an introductory experience,” Howell said. “When they successfully build on it and realize they did this on a sheet of paper, it’s exciting to think what they’ll do when they get more sophisticated tools and access.”

Now, researchers at Georgia Tech have developed a powerful new method to extract meaningful information from even the noisiest data, or when, alternatively, the response of the material is the smallest. Their approach, which combines physical modeling with advanced statistical reconstruction, could significantly improve the accuracy and confidence of nanoscale measurement properties.

The team’s findings, led by Nazanin Bassiri-Gharb, Harris Saunders, Jr. Chair and Professor in the George W. Woodruff School of Mechanical Engineering and School of Materials Science and Engineering (MSE), are reported in Small Methods.

Co-lead authors Kerisha Williams, a former MSE Ph.D. student, and Henry Shaowu Yuchi, a former Ph.D. student in the H. Milton Stewart School of Industrial and Systems Engineering (ISyE), spearheaded the study. Other collaborators include Kevin Ligonde, a Ph.D. student in the Woodruff School; Mathew Repasky, a former Ph.D. student in ISyE; and Yao Xie, Coca-Cola Foundation Chair and Professor in ISyE.

This research was initiated through Georgia Tech’s Forming Teams and Moving Teams Forward seed grant program, launched by the Office of the Executive Vice President for Research in 2021. Designed to support cross-disciplinary collaboration, the program helps build research teams that align with the growing national emphasis on large-scale, team-based projects. The grant supported early work by Bassiri-Gharb, Xie, and Juan-Pablo Correa-Baena, associate professor and Goizueta Early Career Faculty Chair in MSE.

Read the full story on the George W. Woodruff School of Mechanical Engineering website.

For more information, please contact gtri.media@gtri.gatech.edu. 

To learn more about GTRI, visit: Georgia Tech Research Institute | GTRI
 

As microchips grow more complex and data demands intensify, traditional electrical connections are hitting their limits. Speed is king in today’s digital systems, but a major bottleneck remains in how quickly information can move between components like processors and memory. 

This lag is one of the most pressing challenges in advanced hardware design. While processors continue to accelerate, the links that connect them can't keep pace. 

Georgia Tech researcher Ali Adibi is addressing this problem with $5.3 million in funding over three years from the Defense Advanced Research Projects Agency (DARPA). His project is part of DARPA’s Heterogeneous Adaptively Produced Photonic Interfaces (HAPPI) program, which aims to dramatically boost the speed and density of data transmission within microsystems by using light instead of electricity. 

“Optical solutions are highly advantageous for providing the required data rates and power consumptions, and our project is formed to address the most important challenges for achieving the system-level performance,” said Adibi, a professor and Joseph M. Pettit Chair in the School of Electrical and Computer Engineering. 

The project brings together a multidisciplinary team, including collaborators from the Massachusetts Institute of Technology, University of Florida, NY CREATES, and NHanced Semiconductors, Inc.

Going Vertical 

Unlike traditional optical communication, which connects systems across distances, this project focuses on enabling ultra-fast, low-loss communication withinelectronic systems. 

The key innovation is vertically connecting electronic chips in a compact stack. This design helps overcome the limitations of planar optical routing geometries (layouts that guide light horizontally across a chip) which are often not compatible with the dense, 3D chip architectures needed for next-generation computing. 

Adibi’s team is developing a novel 3D optical routing system that can transmit data with minimal loss, high bandwidth, and compact components. The system is designed to scale to large arrays of interconnected chips with minimal interference between data channels.

Smarter Design with Machine Learning 

At the heart of the project is the use of machine learning (ML) to help design and optimize the light-based communication system.  

ML is used to shape and fine-tune the tiny structures that guide light through and between chips. This includes finding the best sizes, shapes, and layouts for components like couplers and waveguides, so they can be made smaller, work more efficiently, and fit into dense chip layouts.  

“Designing a complete, scalable 3D optical routing structure involves innumerable variables,” Adibi said. “Machine learning helps us navigate that complexity and find solutions that would be nearly impossible to identify manually.” 

Tiny "Mirrors"

Another key innovation involves specialized optical structures, or what Adibi refers to as “artificial mirrors”.

The tiny, precisely shaped structures, called metagratings, are embedded in the chip material to redirect light vertically between layers with minimal loss. These components are designed to guide light efficiently in tight spaces, helping connect stacked chips without losing signal strength. 

“Imagine light traveling through a chip and suddenly being redirected straight up. That’s the kind of precise control we’re achieving,” Adibi explained. 

These innovations, along with advanced techniques for building vertical light paths through thick silicon layers and new packaging solutions that keep components precisely aligned, have shown promise on their own. But combining them is what enables dense, high-speed, low-loss communication between vertically stacked chips, something that no system has achieved before, according to Adibi. 

“As with any complex system, success depends on how well everything is structured and optimized,” he said. “Once everything is in alignment, data can move faster, more efficiently, and with less energy consumption for communicating each bit of data.”

About the Research
This research is supported by the Defense Advanced Research Projects Agency (DARPA) Heterogeneous Adaptively Produced Photonic Interfaces (HAPPI) program. Notice ID DARPA-SN-24-105.

Hao started at ECE in 2020 as a postdoctoral fellow, then becoming an assistant professor in 2021. She is the director for the Software/Hardware Co-Design for Intelligence and Efficiency (Sharc) Lab, while also being part of the VLSI Systems and Digital Design Technical Interest Group.

“I’m deeply honored to receive the ON Semiconductor Junior Professorship," Hao said. "It means a lot to have my work recognized in this way, especially as agile chip design becomes such a key part of our AI-driven future. I’m excited and grateful for the chance to keep building, learning, and mentoring—this support will help me do even more meaningful research and teaching.”

Hao’s research focuses on agile software/hardware co-design, especially in the joint area of efficient hardware design and machine learning algorithms. She is also passionate about reconfigurable and high-efficiency computing and building useful electronic design automation tools.

She’s received a number of awards and distinctions during her time at ECE, including the NSF CAREER Award and the Intel Rising Star Faculty Award. Additionally, Hao previously held the Sutterfield Family Early Career Professorship for the last two years.

Their proposal, “Network-on-X (NoX): Hierarchical Interconnect Modeling & DSE for 2.5D/3D Chiplet Architectures,” was one of only 17 selected from a highly competitive pool of 266 submissions across North America, and the only winning team from Georgia Tech.

Kim and Baig’s project, NoX, addresses a critical gap in modern chiplet-based system design. As the industry shifts toward 2.5D and 3D integration, existing tools fail to account for the intricate interactions between architecture and packaging. NoX proposes a cross-layer simulation framework that models hierarchical communication while incorporating real-world packaging constraints—enabling more accurate and scalable design space exploration for AI and high-performance computing (HPC) systems.

The QIF program invests in Ph.D. students across a broad range of technical research areas, empowering them to take steps toward achieving their research goals. The fellowship will provide Baig and Kim with one year of support to pursue their research, as well as offer mentorship from Qualcomm engineers.

Kim is advised by professor Cong (Callie) Hao in the Sharc Lab. Her research focuses on field programmable gate arrays design and architecture-packaging co-design, with an emphasis on developing technology-aware simulators for emerging chiplet-based systems. She interned at IBM Research in 2024 and will be a visiting scholar at ETH Zurich this summer. Her recent work was nominated for Best Paper at 2025 IEEE International Symposium on Field-Programmable Custom Computing Machines.

Baig is advised by professor Muhannad Bakir at the Integrated 3D Systems Lab. He received his B.A. in nanotechnology engineering from the University of Waterloo in Canada, after which he worked as an optoelectronics design engineer and patented novel techniques for large-area printing of microdevices. His current research focuses on chiplet bonding using nanoscale interconnects. He is on a summer internship at Analog Devices as an advanced packaging intern.

Emelianov was recognized for his contributions to ultrasound elasticity and photoacoustic imaging. He is the Joseph M. Pettit Chair Professor in the School of Electrical and Computer Engineering and a Georgia Research Alliance Eminent Scholar. An expert in biomedical imaging instrumentation and nanoagents for imaging and therapy, Emelianov has joint appointments with the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory University. He is also a professor of Radiology at the Emory University School of Medicine and is affiliated with Winship Cancer Institute and other clinical units. 

Emelianov is the director of the Ultrasound Imaging and Therapeutics Research Laboratory, where his group works on the discovery, development, and clinical translation of diagnostic imaging and therapeutic instrumentation, augmented with theranostic nanoagents–small particles that can diagnose and then treat a specific disease. He is a Fellow of the American Institute for Medical and Biological Engineering, and he has served as vice president for Ultrasonics of the IEEE Ultrasonics, Ferroelectrics, and Frequency Control Society.

Fujimoto, a Regents’ Professor in the School of Computational Science and Engineering, was honored for his work in the field of parallel and distributed discrete event simulation. Discrete event simulations model operations within a system and have uses in a wide variety of applications. Fujimoto has authored and co-authored hundreds of technical papers on the subject as well as several books, which span application areas including transportation systems, telecommunication networks, and multiprocessor and defense systems.

He was also named a 2019 Interservice/Industry Training, Simulation and Education Conference (I/ITSEC) Fellow. The announcement for both of these recognitions came only two years after he was named an Association for Computing Machinery Fellow in 2017.

Sarkar, the Stephen P. Fleming Chair of Telecommunications in the School of Computer Science and co-director of the Center for Research into Novel Computing Hierarchies, received his distinction for contributions to compiler technologies for high-performance computing. His work in this area spans multiple aspects of parallel computing software including programming languages, compilers, runtime systems, and debugging and verification systems for high performance computers.

Sarkar has numerous recognitions in the field. He became a member of the IBM Academy of Technology in 1995 and an ACM Fellow in 2008. He has been serving as a member of the U.S. Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC) since 2009 and has served on CRA’s Board of Directors since 2015. 

The IEEE – short for the Institute of Electrical and Electronics Engineers – is the world’s leading professional association for advancing technology for humanity. Through its 420,000-plus members in more than 160 countries, the association is a leading authority on a wide variety of areas ranging from aerospace systems, computers and telecommunications, biomedical engineering, electric power, and consumer electronics.

Dedicated to the advancement of technology, the IEEE publishes nearly one-third of the world’s literature in the electrical and electronics engineering and computer science fields, and has developed nearly 1,300 active industry standards.  The association also sponsors or co-sponsors more than 1,900 international technical conferences and events each year. 

One of these scientists is Nabil Imam, an assistant professor at Georgia Tech’s School of Computational Science and Engineering (CSE). Not only does Imam study the possibilities of brain-inspired computing, he also thinks the answer to this engineering question lies in the same parts of the brain that let us see our world.

Imam posits that by modeling the human visual cortex in computer hardware and software, computers can become both more efficient and more powerful. If achieved, this idea could transform the future of computer manufacturing and programing.

Imam presented his research observations Feb. 3 at a summit hosted by Georgia Tech’s Center for Research in Novel Compute Hierarchies (CRNCH). Imam’s presentation included an overview of the neural circuits within the brain, simulations that have modeled the visual cortex, and designs for silicon chips that emulate brain architecture.

The highlight of Imam’s seminar was his presentation of a microchip architecture he and other researchers have designed to function like the brain’s visual cortex. The system Imam presented has simulated hundreds of millions of neurons and tens of billions of synapses, a step toward making brain-inspired computing a reality. 

“Multi-chip systems have been built using these chips to simulate 100 million neurons and 25 billion synapses in real time,” Imam said. “These chips are very efficient platforms for simulating biological neural networks.” 

To open his seminar, Imam showed circuit connectivity and neural response properties of the primary visual cortex – an area of the brain that is involved in seeing the world.

The primary visual cortex is one of the most extensively studied areas of the brain. It consists of six layers of brain cells totaling about 300 million neurons and 300 billion synapses in primates. Even though this is one of the most well studied areas of the brain, the sheer numbers and complexity involved still make it difficult to understand.  

Imam then discussed computer simulations of the visual system during his presentation. The example Imam used simulates a visual cortex segment of 230,000 neurons, a small sliver of the structure but one that shows promise.

“This is a very small simulation, but it is a very detailed one. The models are based on extensive data curated from years of measurements,” said Imam. “With the right kind of computing platform, we can scale this up and simulate larger portions of the circuit and its interactions with other areas of the brain.”

Due to the sheer computing power required for brain simulations, scaling is a significant obstacle that researchers, like Imam, are studying to overcome.

Simulating one second of a small neural circuit requires hours of computing time. With current computer architectures, it would require speeds measured in exaflops and memory spanning petabytes to achieve a simulation of the human brain.

Presently, the max speed of the world’s fastest supercomputer, called Frontier, is 1.102 exaflops. It is the first, and currently, the only computer to reach exascale speeds. To do this, Frontier requires 7,300 square feet of space, consumes 21 megawatts of power, and pumps 6,000 gallons of water a minute to keep itself cool. This shows how far computers still must go before being able to simulate the brain.

However, progress is being made. The chip Imam discussed at CRNCH Summit 2023 uses specialized integrated circuits to model neurons and their networks found in the brain and visual cortex.

To address the scaling challenge, the computer chips were scaled up via multi-chip platforms to simulate hundreds of millions of neurons and tens of billions of synapses, approaching scales of complex cortical circuitry.

Simulations in this chip are orders of magnitude larger than the 230,000-neuron example simulation Imam presented earlier. 

These chips operate in real time, so one second of brain activity equals one second of computing. These chips are also smaller than a square inch and consume less than one watt of power. The chips also can be integrated with sensors and actuators to interact with the environment. 

Much of Imam’s research remains theoretical and ongoing work continues. But as Imam showed in his CRNCH Summit 2023 seminar, the intersection of computing and neuroscience is rapidly growing and the future for this technology appears bright.

“The goal is to develop computational and analytical methods that will help us understand the behavior of these models” Imam said. “These insights can then be used to develop new classes of computer systems and new models of computation.”

Naeemi, who is an ECE graduate and joined the faculty in 2008, was selected to the five-year appointment for his exceptional record of scholarship and service to the Institute. Criteria for the designation of Dean's Professor include outstanding scholarship, dedication to education, and excellence in service at Institutional and national/international levels.

His research crosses the boundaries of materials, devices, circuits, and systems investigating integrated circuits based on conventional and emerging nanoelectronic and spintronic devices and interconnects.

Currently, the main focus of Naeemi’s research is to develop a comprehensive end-to-end modeling and optimization framework for emerging memory and logic devices starting with fundamental physics to devices, and then to circuits and applications.

He conducts this research out of the Nanoelectronics Research Lab, where is the director. Ferroelectric and magnetic devices are of particular interest for his group. They are also working on an academic process design kit (PDK) for one of the most advanced CMOS technology nodes (3nm) to enable Design-Technology Co-Optimization (DTCO).

Naeemi leads a six-university effort supported by the National Science Foundation to develop and evaluate interactive visualizations and simulation tools that help students gain better conceptual understanding of semiconductor physics and devices. The tools from this effort are being used by thousands of students around the world.

He’s received a number of prestigious awards, including the IEEE Electron Devices Society (EDS) Paul Rappaport Award for the best paper in the 2007 IEEE Transactions on Electron Devices journal, an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards at international conferences. He is also the first recipient of the IEEE Solid-State Circuits Society James D. Meindl Innovators Award. Judged by the direct vote of the ECE senior class, he was awarded W. Marshall Leach/Eta Kappa Nu Outstanding Senior Teacher Award in 2023.

In addition to his educational and research responsibilities, he also serves as the editor-in-chief of the IEEE Journal on Exploratory Computational Devices and Circuits and is the associate director for computation for the NSF-supported National Nanotechnology Coordinated Infrastructure.

Naeemi has been at Georgia Tech since 1999, first a graduate student, getting his M.S. and Ph.D. degrees in electrical and computer engineering from the Institute in 2001 and 2003, respectively.

He then worked as a research engineer in the Microelectronics Research Center at Georgia Tech from 2004 to 2008, before joining the ECE faculty.

Prior to Georgia Tech, he received his B.S. degree in electrical engineering from Sharif University, Tehran, Iran in 1994. After his undergraduate studies, he stayed in Tehran, where he worked as a design engineer with Partban and Afratab Companies.

The full-day event was entirely student-organized and provided a unique opportunity for the DCL community to share research, foster interdisciplinary collaboration, and engage in discussions at the frontier of control theory, robotics, and decision-making. The symposium was funded by the Demetrius T. Paris Junior Professorship, held by School of Electrical and Computer Engineering (ECE) associate professor Sam Coogan.

"We have a long tradition in ECE of hosting the DCL student symposium annually,” Coogan said. “It's a great opportunity for students, postdocs, and faculty from across campus to come together for a day of sharing research and finding new connections. And it's completely student-organized and student-led. The student organizing committee gains valuable experience planning a meeting like this—a skill that proves useful whether they pursue careers in academia or industry."

In the morning, students participated in a series of rapid two-minute talks consisting of concise snapshots of their research, followed by a poster session. This format encouraged spontaneous discussion and collaboration among attendees. In the afternoon, students had the opportunity to present longer, 15 minute, spotlight talks of their research.

“The symposium is an excellent opportunity for student researchers to practice presenting their work in a low-stakes academic context,” said Akash Harapanahalli, a Ph.D. student working with Coogan, and the chair of the organizing committee. “My favorite part of organizing the event was being able to bring together participants from all over campus—including the Schools of Electrical and Computer Engineering, Mechanical Engineering (ME), Aerospace Engineering (AE), Industrial and Systems Engineering (ISyE), and Chemical and Biomolecular Engineering (ChBE)—who each had unique perspectives to offer”.

The symposium also featured four keynote presentations from Georgia Tech faculty: ISyE associate professor Siva Theja Maguluri, AE associate professor Yongxin Chen, ME assistant professor Shreyas Kousik, and AE assistant professor Lu Gan, who provided interesting perspectives on the varying theoretical and applied aspects of decision making, control, optimization, and robotics.

There was also a thought-provoking panel entitled “The Future of Decision-Making and Control,” where Kousik, AE assistant professors Glen Chou and Sarah Li, along with ECE research engineer Chih-Yuan (Frank) Chiu answered several student questions ranging from the importance of safety in the modern era, to how to survive as an academic.

The DCL Symposium continues to serve as a vibrant platform for students to showcase their work, receive feedback from peers and faculty, and connect across research labs. The organizing committee extends their thanks to all speakers, attendees, and participants who helped make the 2025 event a success.

Anyone wanting to participate in future years, or be added to the DCL mailing list, please email Akash Harapanahalli at aharapan@gatech.edu.

His paper, “Heterogeneous Integration Enabled by 3D Stitch-Chips," recently won the Best Paper Award in the Advanced Packaging Technologies from the IEEE Transactions on Components, Packaging and Manufacturing Technology, a premier package design publication.

Traditional chip interconnect methods like wire-bonding or flip-chip mounting either struggle with signal integrity at high frequencies or require complex fabrication steps.

The paper introduces a new interconnect technology called the 3D Stitch-Chip (3DSC), which offers a novel solution to the limitations of traditional interconnection methods such as wire bonding, die-embedding, and flip-chip bonding. Existing methods can be bulky, hard to manufacture, or cause issues with signal quality, especially when dealing with fast, high-frequency signals used in modern electronics.

3DSC avoids these problems by using a special structure that includes vertical channels and lateral connectors to link chips together. This allows the chips to be mounted face-up, without digging cavities, and helps keep signals clear even at very high speeds. This new method was successfully demonstrated for Ka-band frequencies (26-40 gigahertz), which are used in cutting-edge wireless and radar systems. Its modular design makes it especially useful for building complex systems that combine many different chips in a compact space.

He, along with his co-authors— Ph.D. students Zhonghao Zhang and Geyu Yan, and Georgia Tech Research Institute senior research engineer Paul K. Jo—conducted the research under the guidance of professor Muhannad S. Bakir, as part of the Integrated 3D Systems Group.

The work contributes to the group’s broader mission to rethink packaging architectures for heterogeneous integration, enabling future radio frequency systems to be smaller, faster, and more efficient.

Oh, Zhang, Jo, and Bakir will accept the award during the 75th Electronic Components and Technology Conference.

In a joint statement, PTC co-directors Wilbur Lam and Stanislav Emelianov said, “The appointment of Dr. LaPlaca and Dr. Yeo as Peterson Professors exemplifies the vision of Bud and Valerie Peterson — advancing innovation and collaboration through the Pediatric Technology Center to bring breakthrough ideas from the lab to the bedside, improving the lives of children and transforming healthcare.”

LaPlaca is a professor and associate chair for Faculty Development in the Department of Biomedical Engineering, a joint department between Georgia Tech and Emory University. Her research is focused on traumatic brain injury and concussion, concentrating on sources of heterogeneity and clinical translation. Specifically, she is working on biomarker discovery, the role of the glymphatic system, and novel virtual reality neurological assessments.    

“I am thrilled to be chosen as one of the Peterson Professors and appreciate Bud and Valerie Peterson’s dedication to pediatric research,” she said. “The professorship will allow me to broaden research in pediatric concussion assessment and college student concussion awareness, as well as to identify biomarkers in experimental models of brain injury.”

In addition to the research lab, LaPlaca will work with an undergraduate research class called Concussion Connect, which is part of the Vertically Integrated Projects program at Georgia Tech.

“Through the PTC, Georgia Tech and Children’s will positively impact brain health in Georgia’s pediatric population,” said LaPlaca.

Yeo is the Harris Saunders, Jr. Professor in the George W. Woodruff School of Mechanical Engineering and the director of the Wearable Intelligent Systems and Healthcare Center at Georgia Tech. His research focuses on nanomanufacturing and membrane electronics to develop soft biomedical devices aimed at improving disease diagnostics, therapeutics, and rehabilitation.

“I am truly honored to be awarded the Peterson Professorship from the Children’s PTC at Georgia Tech,” he said. “This recognition will greatly enhance my research efforts in developing soft bioelectronics aimed at advancing pediatric healthcare, as well as expand education opportunities for the next generation of undergraduate and graduate students interested in creating innovative medical devices that align seamlessly with the recent NSF Research Traineeship grant I received. I am eager to contribute to the dynamic partnership between Georgia Tech and Children’s Healthcare of Atlanta and to empower innovative solutions that will improve the lives of children.”

The Peterson Professorships honor the former Georgia Tech President and First Lady, whose vision for the importance of research in improving pediatric healthcare has had an enormous positive impact on the care of pediatric patients in our state and region.

The Children’s PTC at Georgia Tech brings clinical experts from Children’s together with Georgia Tech scientists and engineers to develop technological solutions to problems in the health and care of children. Children’s PTC provides extraordinary opportunities for interdisciplinary collaboration in pediatrics, creating breakthrough discoveries that often can only be found at the intersection of multiple disciplines. These collaborations also allow us to bring discoveries to the clinic and the bedside, thereby enhancing the lives of children and young adults. The mission of the PTC is to establish the world’s leading program in the development of technological solutions for children’s health, focused on three strategic areas that will have a lasting impact on Georgia’s kids and beyond.

Georgia Tech School of Electrical and Computer Engineering Professor Ali Adibi won the Innovation Award in Quantum Sensing and Nano Electronics and Photonics at the Society of Photo-Optical Instrumentation Engineers (SPIE) Photonics West Meeting in January. 

The award recognizes a member of Region 3 who has shared technical and professional abilities through teaching in industry, government, or in an institution of higher learning and in so doing has made an outstanding contribution to the electrotechnology student population.

Rincón-Mora, who is also a Fellow of the National Academy of Inventors, the Institute of Electrical and Electronics Engineers, and the Institution of Engineering and Technology, was selected out of the 24,000 members across Jamaica and the nine U.S. states that make up Region 3.  

“I grew up, studied, and worked in Florida and Georgia nearly all my life, dedicating my entire academic and professional career to learning, teaching, developing, and researching analog and power electronics, so receiving this award from IEEE in this region is a very special honor for me,” he said.

This is his second IEEE award in the last few months, having received the IEEE Atlanta Outstanding Educator Award in Nov. 2024.
Rincón-Mora has more than 25 years of service at Georgia Tech and the greater Atlanta area. He earned his M.S. in 1994 and Ph.D. in 1996 from Georgia Tech, and was inducted into Georgia Tech's Council of Outstanding Young Engineering Alumni in 2000. He worked for Texas Instruments in 1994–2003, was adjunct professor at ECE in 1999–2001, and has been a full-time professor  since 2001.
He is a recognized authority in the semiconductor industry in power supplies and energy harvesting.

Rincón-Mora pioneered the use of positive feedback loops to accelerate the response of low-dropout regulators and hysteretic control to stabilize and accelerate the response of switching power supplies. He developed and mastered techniques for rejecting and suppressing power-supply noise, allowing cell phones, tablets, and laptops power supplies to be more accurate, occupy less space, and consume less energy.

He also developed ground-breaking switched-inductor microchips that draw power from tiny fuel cells, vibrating piezoelectric transducers, and magnetically coupled coils. He pioneered ways of amplifying the power they draw by investing pre-damping energy into the system. He similarly developed photovoltaic and thermoelectric microchip technologies that draw more power from ambient light and heat and consume less energy. With these innovations, wireless microsystems draw more power from biological and ambient sources, so they can perform more functions across longer periods.

Rincón-Mora's current research focuses on the design and development of silicon-based microchips and microsystems that draw and condition power from tiny batteries, fuel cells, magnetically coupled coils, and generators that harness ambient energy from motion, light, temperature, and radiation to supply and sustain mobile, portable, and self-sustaining devices like wireless microsensors for biomedical, consumer, industrial, and military applications.

He will accept the award at the Region 3 Awards Dinner this in Charlotte, N.C.
 

He and his co-authors were recognized for their paper, “An Overview of Information-Theoretic Security and Privacy: Metrics, Limits and Applications,” which provides a comprehensive tutorial on foundational contributions to information-theoretic security.

The paper adopts an integrative perspective, detailing key security metrics such as secrecy and privacy, the methodology behind information-theoretic approaches, and the system design principles that emerge from them. It also explores the techniques that enable information-theoretic security to be applied in communication and computing systems.

Additionally, the authors emphasize the dual importance of fundamental limits and coding techniques in the design of secure communication systems.

Bloch, who also serves as the College of Engineer’s associate dean for Academic Affairs, is the inaugural winner of the award alongside his co-authors.

The IEEE Joy Thomas Tutorial Paper Award recognizes publications that expose subjects in information theory to a broad audience and stimulate interest and engagement in them.

Bloch came to Georgia Tech as a graduate student, earning his M.S. in electrical and computer engineering in 2003, and later a Ph.D. from Georgia Tech ECE in 2008. He joined Georgia Tech as faculty at the Lorraine campus in Metz, France in 2009, and in 2013, he moved to the main campus in Atlanta.

Prior to that he received the engineering degree from Supélec. In 2006, he received a Ph.D. in Engineering Science from the Université de Franche-Comté. Bloch spent a year as a postdoctoral research associate at the University of Notre Dame before returning to Georgia Tech in 2009. From January 2021 to January 2024,  Bloch was  the associate chair for Graduate Affairs in ECE.

RFID is a wireless system that uses radio waves to send information between devices and track objects. It’s become very important to the continued development of other crucial technologies like 5G wireless networks and virtual reality (VR).

Improvements to the wireless technology would lead to improved Internet of Things (IoT) devices with higher data rates and lower latency, as well as compact VR devices that accurately track location and orientation, facilitate real-time gesture recognition in virtual spaces, among other things.

RFID technology has the potential to improve gesture controls in virtual reality, tracking capabilities for the position and direction of drones and robots, and can be used in sensors to monitor temperature and air quality.

A pair of Georgia Tech School of Electrical and Computer Engineering (ECE) Ph.D. students were recently recognized for their work that is helping to bring this technology closer to becoming a reality.

Theodore Callis and Marvin Joshi received the Best Paper Award at the 2024 IEEE RFID Technology and Application Conference for their research on novel RFID architecture applications.

Their paper, “Novel mmWave/5G RFID Architectures for Next Generation of IoT Devices and VR Applications,” highlighted key advancements from the Professor Manos Tentzeris’ ATHENA lab, where they are using optics-inspired techniques and machine learning to push the limits of RFID technology.

This includes addressing challenges in long-range, wide-angle, and energy-efficient IoT designs, enabling precise localization and enhanced feasibility of mmID-based AR/VR applications

These designs bring together optics, machine learning, and RFID technology to make systems smarter and more efficient. Lenses, like those in glasses or microscopes, are added to RFIDs to sharpen signals, cover wider angles, and work over longer distances. Machine learning helps by making it easier to track locations, detect orientations, and recognize gestures, which can be used in AR/VR, robots, and drone tracking.

Callis and Joshi are both research assistant in the ATHENA lab. Callis’s current research focuses on additively manufactured RFID systems and integration of biological/chemical sensors with RFID systems.

Joshi’s current research interests focus on the integration of RADAR and artificial intelligence/machine learning with RF modules, specifically next generation RFIDs and mmIDs for ultra-long-range localization and tracking applications.

Cadence Design Syst­ems, Inc. produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards. The company’s Diversity in Technology Scholarship supports underrepresented groups in their pursuit of careers in science, technology, engineering, and math (STEM) fields.

According to Khan, Tasneem’s work provides one of the most detailed and earliest accounts of reliability physics aspects of ferroelectric field-effect transistors for non-volatile memory applications. Her recent research introduces a novel characterization method which provides an understanding of the transport and the status of the ferroelectric during the FEFET’s operation. This could pave ways for ferroelectric devices to make the electrical hardware platform sustainable for data-intensive computing, leading to wide range of novel, ultra-fast and efficient intelligent applications.

Cadence scholarship winners are selected based on their impressive academic achievements, leadership, and drive to shape the world of technology. The scholarship works to build a culture that embraces inclusivity as well as diverse backgrounds, experiences, and ideas.

In addition to her Ph.D. research, Tasneem volunteers for IEEE Women in Engineering Society (WIE) and is currently a board member of the Atlanta chapter. She was an active member of the WIE Bangladesh chapter before coming to the United States as a graduate student. Tasneem is among few female students working in Georgia Tech's cleanrooms and hopes to increase female representation in the semiconductor industry through her research and extra-curricular activities.

All recipients of a Cadence scholarship are currently pursuing a technology-related degree, such as computer science, computer engineering, electrical engineering, and electronic engineering, and came highly recommended by their professors and advisors.

Cadence Design Syst­ems, Inc. produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards. The company’s Diversity in Technology Scholarship supports underrepresented groups in their pursuit of careers in science, technology, engineering, and math (STEM) fields.

Athena's research focuses on developing a fundamental understanding of the mechanism of neuromorphic devices and tailoring the device characteristics through material optimization and electrical testing engineering. She works at the Marcus Inorganic Cleanroom at Georgia Tech for semiconductor device fabrication and collaborates with industry partners to improve the performance of analog neuromorphic chips for deep learning applications.

“I am humbled to receive this scholarship, and it would not have been possible without the generous support from my advisor, Professor Eric M. Vogel,” said Athena. “I would also like to express my gratitude to Professor Samuel Graham, Jr. at the University of Maryland for his generous support. Finally, thanks to ECE for their support during my Ph.D.”

Outside the lab, Athena is active in Women in Electrical and Computer Engineering (WECE) and Women in Material Science and Engineering (WiMSE). She is actively involved in arranging outreach events to increase the involvement of women and minorities in technology, including a STEM workshop organized by WECE with support from the international rescue committee at Clarkston High School for students from refugee communities. She hopes to encourage minorities and females in STEM and semiconductor research.

All recipients of a Cadence scholarship are currently pursuing a technology-related degree, such as computer science, computer engineering, electrical engineering, and electronic engineering, and came highly recommended by their professors and advisors.

Cadence Design Syst­ems, Inc. produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards. The company’s Diversity in Technology Scholarship supports underrepresented groups in their pursuit of careers in science, technology, engineering, and math (STEM) fields.

Nnamdi’s graduate research focuses on the intersection of bioinformatics, machine learning, and signal and image analysis with broad applications to clinical decision support. In addition to his Ph.D. research, Nnamdi serves as the African Graduate Students Connect (AGSC) vice president at Georgia Tech and is actively involved in organizing education and social events that are beneficial to all African graduate students.

Cadence scholarship winners are selected based on their impressive academic achievements, leadership, and drive to shape the world of technology. The scholarship works to build a culture that embraces inclusivity as well as diverse backgrounds, experiences, and ideas. All recipients of a Cadence scholarship currently pursuing a technology-related degree, such as computer science, computer engineering, electrical engineering, and electronic engineering, and came highly recommended by their professors and advisors.

The project, led by the Texas Institute for Electronics (TIE) at The University of Texas at Austin, represents a total investment of $1.4 billion. The $840 million award from DARPA, announced by TIE in 2024, aims to develop the next generation of high-performing semiconductor microsystems for the Department of Defense (DoD). 

“We are honored to collaborate with TIE and its broader team on this far reaching and strategic program to enable best in class 3D heterogeneous integration (3DHI) processes and technologies in the United States,” said Muhannad S. Bakir, the Dan Fielder Professor in the School of Electrical and Computer Engineering and director of the 3D Systems Packaging Research Center, who is heading the project for Georgia Tech. 

3DHI is a semiconductor manufacturing process that incorporates different materials and components into microsystems with precision assembly. The use of 3DHI allows for the creation of high-performance, compact, and energy-efficient systems. 

The investment is part of DARPA’s Next Generation Microelectronics Manufacturing (NGMM) Program comprised of 32 defense electronics and leading commercial semiconductor companies and 18 nationally recognized academic institutions.

Under the agreement, TIE will establish a national open access R&D and prototyping fabrication facility. The facility will enable the DoD to create higher performance, lower power, lightweight, and compact defense systems. The advancements are expected to have wide-ranging applications, including radar, satellite imaging, and unmanned aerial vehicles.  

Georgia Tech will provide a wide range of expertise in 3DHI including design, fabrication and assembly processes, and characterization to support the NGMM national open-access R&D and prototyping facility at TIE.  

Regents' Professor and Morris M. Bryan, Jr. Professor Suresh K. Sitaraman in the George W. Woodruff School of Mechanical Engineering will be a key contributor to Georgia Tech’s efforts on the project.

“We are delighted to be partnering with UT/TIE on the establishment of a 3D Heterogeneous Integration Microsystem prototyping  facility,” said Sitaraman. “In addition to advancing fundamental science, this project is a great opportunity for Georgia Tech to demonstrate and integrate our ground-breaking and innovative 3DHI research approaches and technology solutions into TIE’s prototyping facility, and understand the challenges involved when translating lab-scale research work to a large industry-strength fabrication facility.” 

ECE Professors Saibal Mukhopadhyay, Arijit Raychowdhury, Visvesh Sathe, and Shimeng Yu will be working alongside Bakir and Sitaraman. 

A significant portion of the research will be conducted at the Institute for Matter and Systems (IMS), which operates Georgia Tech’s state-of-the-art electronics and nanotechnology core facilities. 

Read the press release from TIE and view the project’s team and partners.  

Chiplet-based systems are gaining exponential traction as a solution to these demands. However, because of multi-folded challenges, there is still much to be learned before chiplet-based systems, especially their die-die-to communication technologies, receive mainstream adoption.

Georgia Tech School of Electrical and Computer Engineering (ECE) third-year Ph.D. student, Srujan Penta won the Intel Outstanding Student Paper Award at the IEEE 74th Electronic Components and Technology Conference (ECTC) in Denver for his research on the performance-cost tradeoff of chiplet-based systems in 2D packaging technology.

“Just being able to present our work to so many bright minds at the conference and network with them was an enriching opportunity in my Ph.D. journey,” Penta said. “It is a cherry-on-top to receive the IEEE 74th ECTC Intel Outstanding Student Paper Award for this work.”

This paper demonstrated a parallel interface in a standard 2D package, as a cost-optimized alternative to the traditional chiplet interface and packaging architecture pairings, while providing moderate power and beachfront efficiency.

Penta designed interfaces in compliance with the Universal Chiplet Interconnect Express (UCIe), which is quickly becoming an industry standard.

He tested the interfaces for technical specifications of insertion loss and crosstalk, checking his findings against data from 3D EM simulations. At the same time, he evaluated 2D chiplet systems from a cost-based perspective against 2.5D systems to achieve a more complete understanding of the financial and technical trade-offs.

The research was completed in collaboration with Marvell Semiconductors, Inc. Penta was also aided by his advisor, ECE Professor and 3D Systems Packaging Research Center Director Muhannad Bakir.

Many of the world leaders in the semiconductor industry and academia come to ECTC each year.

Penta pursed a minor in Technology Innovation (TI:GER) from the Scheller School of Business. He was also named as one of the fifty global 2024 QUAD Fellows by the Institute of International Education (IIE). As part of the fellowship, he was invited to the White house and the U.S. State Department in Oct. 2024 to represent his home country, India.

Beyond his academic pursuits, he mentors students through the Office of Graduate Education at Georgia Tech and volunteers with the Out in Science, Technology, Engineering, and Mathematics (oSTEM) organization as a member of the Inclusivity, Diversity, Equity, and Accessibility (IDEA) team.

Ferroelectric field effect transistors (FEFET) have emerged as a promising solution for logic and memory applications in next-generation edge computing, artificial intelligence, and enterprise cloud applications. The non-volatile memory technology harnesses electric polarization to store data in binary, and has been renowned for its speed, density, and ultra-low energy consumption.

Their widespread adoption, however, hinges on addressing critical reliability challenges.

Georgia Tech School of Electrical and Computer Engineering (ECE) third-year Ph.D. candidate Priyankka Ravikumar undertook the challenge of bringing clarity to one major reliability concerns in her paper, “First write pulse-induced interface damage in ferroelectric field-effect transistors.”

The research, completed in ECE associated professor Asif Khan’s lab, recently won the Best Student Paper Award at the 2024 IEEE International Integrated Reliability Workshop.

The research reported on a new phenomenon in FEFET, known as the first switch effect and explains the phenomenon’s origin. The findings reveal that the very first write operation on a FEFET contributes to nearly 50% of the total degradation seen over the device's lifetime.

The work is an important step towards understanding the fundamental drivers of degradation in FEFETs, laying the groundwork for developing innovative strategies to mitigate degradation, improve device performance, and facilitate the widespread adoption of the technology.

Ravikumar will be presenting this work at an invited talk next year at the 2025 IEEE International Reliability Physics Symposium.

Georgia Tech School of Electrical and Computer Engineering Ph.D. student Nelson Sepúlveda-Ramos was recently recognized for his transistor research that hopes to lead to smaller, faster, and more reliable devices.

He won the Best Paper Award at the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) for his presentation titled, “Using Pulsed-Mode Measurements of SiGe HBTs for Non-Destructive, Improved RF-SOA Estimation.”

The paper explores innovative methodologies to study the physics of Silicon-Germanium heterojunction bipolar transistors (SiGe HBTs) and introduces new approaches for testing and defining enhanced safe operating limits to optimize performance.

SiGe HBTs are a special type of transistor made by combining two materials: silicon, which is used in most electronics, and germanium, which helps improve performance. These transistors work faster than regular transistors and perform well in extreme conditions, making them great for things like satellite technology.

Transistors operate within safe limits, ensuring they don’t overheat or break down during use. Traditional testing methods use continuous stress to determine  these limits but must be applied cautiously to avoid damaging  the transistor, meaning its full power potential isn’t fully utilized.

Sepúlveda-Ramos’ research proposed a "pulsed-mode measurements" approach which applies very short bursts of stress allowing for the limits of the transistor to be pushed closer to the actual limit.

The ability to push transistors further will allow engineers to more reliably study their behavior at higher levels and deliver better performance, like faster processing or stronger signals without risking damage.

This will allow engineers to develop more efficient designs for electronics, potentially leading to improved technology for society, including internet speed, GPS accuracy, and reliability of tech in cars, planes, and space exploration.

BCICTS is the IEEE’s premier annual technical conference, drawing leading researchers, industry experts, and students from around the globe to showcase pioneering advancements in semiconductor technology.

Sepúlveda-Ramos completed the research along with fellow ECE Ph.D. student Harrison P. Lee, senior research engineer Jeffrey W. Teng, who is now with the Aerospace Corporation, and Professor John D. Cressler, as part of Cressler’s Silicon-Germanium Devices and Circuits research team.
 

As part of the CHIPS National Advanced Packaging Manufacturing Program (NAPMP), three advanced packaging research projects will receive investments of up to $100 million each. This work will accelerate the development of cutting-edge substrate and materials technologies essential to the semiconductor industry.  

"Glass-core packaging holds the promise to revolutionize the field of advanced packaging and impact major paradigms such as artificial intelligence, mm-wave/THz communication, and photonic connectivity," said Muhannad Bakir, Dan Fielder Professor in the School of Electrical and Computer Engineering and Director of the 3D Systems Packaging Research Center at Georgia Tech.  "We look forward to supporting Absolics in establishing a glass-core packaging facility in the State of Georgia through workforce development initiatives." 

Because of President Biden’s CHIPS and Science Act, this proposed investment would support over an estimated 1,000 construction jobs and approximately 200 manufacturing and R&D jobs in Covington and enhance innovation capacity at Georgia Institute of Technology, supporting the local semiconductor talent pipeline. 

The proposed investment with Absolics is the first proposed CHIPS investment in a commercial facility supporting the semiconductor supply chain by manufacturing a new advanced material.

Read the full story

The award recognizes lifetime research contributions to the U.S. semiconductor industry by university faculty. Since being established in 1995, only 50 faculty members from top universities around the U.S. have won the award.

"Professors Suman Datta and Michael Flynn join an illustrious group of past award winners who have made significant contributions to the semiconductor industry,” SRC President and CEO Todd Younkin said in a press release. “Their groundbreaking research and its translation into the commercial domain continue to drive innovation and excellence in our field.”

Datta, who is the Joseph M. Pettit Chair of Advanced Computing in the Georgia Tech School of Electrical and Computer Engineering (ECE) and a Georgia Research Alliance (GRA) Eminent Scholar, is just the second Georgia Tech faculty member to win the award. Former ECE professor Jim Meindl won the award in 1999.

He’s renowned for the design, fabrication, characterization, and compact modeling of nanoelectronic devices, as well as their applications in circuits for next-generation, energy-efficient, and high-performance computing.

Since coming to ECE in the Fall of 2022, Datta, who also has a joint appointment with the School of Materials Science and Engineering, has directed the Semiconductor Technology Advanced Research (STAR) Laboratory. The STAR research group focuses on novel semiconductor devices that enable new compute models such as in-memory compute, brain-inspired compute, and cryogenic compute.

Datta’s research is primarily funded by the National Science Foundation (NSF), Defense Advanced Research Projects Agency (DARPA), Department of Energy, Defense Threat Reduction Agency, Semiconductor Research Corporation, and semiconductor companies like Intel, Micron, Samsung Electronics, Applied Materials, EMD Performance Materials.

Datta had established himself as a recognized leader in semiconductor innovation, with over 20 years of experience before joining ECE

From 1999-2007, he was in the Advanced Transistor Group at Intel Corporation, where he led the research and development efforts for several generations of high-performance logic transistors such as high-k/metal gate, Tri-gate, and strained channel complementary metal-oxide-semiconductor transistors.

He then joined academia at the Pennsylvania State University (PSU), where he was a professor of electrical engineering until 2015. His group at PSU pioneered advances in compound semiconductor-based quantum-well field effect transistors and tunneling field effect transistors.

Datta continued to be at the forefront of semiconductor innovation during his time as the Stinson Endowed Chair Professor of Nanotechnology in the Electrical Engineering Department at the University of Notre Dame from 2015-2022. There, he was the director of several multi-university research centers.

Most notably, one of those centers, the Extremely Energy Efficient Collective Electronics (EXCEL), sponsored by NSF, explored an alternate computing hardware that leverages continuous-time dynamics of emerging devices to execute optimization, learning, and inference tasks.

Additionally, he led the ASCENT project (Applications and Systems-driven Center for Energy-Efficient integrated Nano Technologies) funded by SRC’s Joint University Microelectronics Program.

His work has resulted in over 475 journal and refereed conference papers and more than 187 issued patents related to semiconductor devices.

He’s received several other notable distinctions for his research, including being named a Fellow of IEEE and the National Academy of Inventors.

Datta received his undergraduate degree in electrical engineering from the Indian Institute of Technology in Kanpur, India, and his Ph.D. degree in electrical and computer engineering from the University of Cincinnati. 
 

“The workforce that will emerge from this program will tackle a global challenge through sustainable innovations in device design and manufacturing,” said Yeo, Woodruff Faculty Fellow and associate professor in the George W. Woodruff School of Mechanical Engineering and the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory University.

The funding, from the National Science Foundation (NSF) Research Training (NRT) program, will address the environmental impacts resulting from the mass production of medical devices, including the increase in material waste and greenhouse gas emissions.

Under Yeo’s leadership, the Georgia Tech team comprises multidisciplinary faculty: Andrés García (bioengineering), HyunJoo Oh (industrial design and interactive computing), Lewis Wheaton (biology), and Josiah Hester (sustainable computing). Together, they’ll train 100 graduate students, including 25 NSF-funded trainees, who will develop reuseable, reliable medical devices for a range of uses. 

“We plan to educate students on how to develop medical devices using biocompatible and biodegradable materials and green manufacturing processes using low-cost printing technologies,” said Yeo. “These wearable and implantable devices will enhance disease diagnosis, therapeutics, rehabilitation, and health monitoring.”

Students in the program will be challenged by a comprehensive, multidisciplinary curriculum, with deep dives into bioengineering, public policy, physiology, industrial design, interactive computing, and medicine. And they’ll get real-world experience through collaborations with clinicians and medical product developers, working to create devices that meet the needs of patients and care providers.

The Georgia Tech NRT program aims to attract students from various backgrounds, fostering a diverse, inclusive environment in the classroom — and ultimately in the workforce.

The program will also introduce a new Ph.D. concentration in smart medical devices as part of Georgia Tech's bioengineering program, and a new M.S. program in the sustainable development of medical devices. Yeo also envisions an academic impact that extends beyond the Tech campus.

“Collectively, this NRT program's curriculum, combining methods from multiple domains, will help establish best practices in many higher education institutions for developing reliable and personalized medical devices for healthcare,” he said. “We’d like to broaden students' perspectives, move past the current technology-first mindset, and reflect the needs of patients and healthcare providers through sustainable technological solutions.” 

His research and accomplishments have helped him to become a nationally recognized expert in biomedical imaging instrumentation and nanoagents for imaging and therapy.

The IEEE Ultrasonics, Ferroelectrics, and Frequency Control Society (UFFC) recently celebrated his achievements and impact in the ultrasonics field by honoring him with the prestigious Rayleigh Award at the organization’s annual meeting in Taipei, Taiwan.

The award, which is the IEEE UFFC’s highest accolade, recognizes sustained outstanding achievements in technical innovations, research, education, publications, and professional contributions over a span of more than 25 years.

Emelianov, a Georgia Research Alliance Eminent Scholar, received the award for his seminal contributions to elasticity imaging, ultrasound-guided photoacoustic imaging, and theranostic contrast agents.

“The Rayleigh award is an honor that highlights the transformative potential of biomedical ultrasound, and it reflects collaborative efforts of my trainees, colleagues, and collaborators who have contributed to advancing diagnostic ultrasound imaging and image-guided therapy,” Emelianov said.

His work has pioneered several techniques in those research areas and are capable of detecting and diagnosing cancer and other pathologies, assisting treatment planning, and enhancing image-guided therapy and monitoring of the treatment outcome. He has also developed approaches for image-guided molecular therapy and therapeutic applications of ultrasound and electromagnetic energy.

Emelianov, holds a joint appointment in the School of Electrical and Computer Engineering and the Wallace H. Coulter Department of Biomedical Engineering (BME). He is also appointed at the Emory University School of Medicine, where he is affiliated with Winship Cancer Institute, Department of Radiology, and other clinical units

He’s authored of over 250 archival publications including peer-reviewed research articles, invited reviews and book chapters, and more than 550 proceedings, abstracts, and presentations.

Currently, he runs the Ultrasound Imaging and Therapeutics Research Laboratory, with a research focuses on cancer and other disease imagining, ranging from molecular imaging, functional imaging, and tissue differentiation to drug delivery and release, image-guided surgery, and intervention.

Emelianov was recently named the co-director of the Children’s Healthcare of Atlanta Pediatric Technology Center (PTC). In this role, he oversees a unique partnership that supports interdisciplinary research among clinicians, engineers, and scientists from Georgia Tech, Children’s, and Emory University. The goal is to harness the power of artificial intelligence, data science, and cutting-edge medical devices to address the most pressing challenges in pediatric healthcare.

In recognition of his groundbreaking contributions to the field, Emelianov has received several other recognitions, including Fellow of the American Institute for Medical and Biological Engineering (AIMBE), Institute of Electrical and Electronics Engineers (IEEE), Acoustical Society of America (OSA), and Society of Photographic Instrumentation Engineers (SPIE).

Emelianov has been with ECE since 2015. He received his undergraduate and graduate education from Moscow State University. He then completed his post-graduate work at the University of Michigan.

From 2002 to 2015, Emelianov was a faculty member in the BME and ECE Departments at the University of Texas at Austin and Department of Imaging Physics at the University of Texas M.D. Anderson Cancer Center.

 The Department of Commerce has granted the Semiconductor Research Corporation (SRC), its partners, and Georgia Institute of Technology $285 million to establish and operate the 18th Manufacturing USA Institute. The Semiconductor Manufacturing and Advanced Reseach with Twins (SMART USA) will focus on using digital twins to accelerate the development and deployment of microelectronics. SMART USA, with more than 150 expected partner entities representing industry, academia, and the full spectrum of supply chain design and manufacturing, will span more than 30 states and have combined funding totaling $1 billion. 

It was highlighted by Ph.D. student Seung Yoon Lee winning the third prize of Student Paper Competition for his research titled, “Highly Integrated mmWave Antenna-on-Chip Arrays Using Substrate-Integrated Air Cavities.”

The paper was selected out of 172 accepted papers at the conference.

It presents the design, fabrication, and characterization of a 60 gigahertz (109 hertz) beamforming array for 6G high data-rate wireless systems. Specially, it introduces mmWave 1×8 on-chip miniaturized cavity antenna arrays with high efficiency and reduced mutual coupling, leading to better connectivity.

The proposed silicon-based antenna offers the potential for future wireless system-on-a-chip (SoC) applications better equipped to handle high data throughput. Microfabrication of the proposed antennas and cavities was performed at Georgia Tech cleanroom facility.

Lee completed the research in Associate Professor Nima Ghalichechian’s mmWave Antennas and Arrays Laboratory.

This is the latest of many research recognitions for Lee. He most recently received the IEEE Antenna and Propagation Society grant for the development of a highly efficient on-chip antenna array, in hopes of addressing growing global mobile video traffic.

Lee has also published seven peer-reviewed journal articles, 14 international conference papers, and is the inventor of 19 patents.

Three other ECE research groups presented research at the conference: Professor Morris Cohen’s Low Frequency Radio Group, Professor Visvesh Sathe’s Processing Systems Lab, and Professor Manos Tentzeris’ ATHENA Research Group.
 

Ph.D. candidate Zishen Wan won the Best Presentation Award, while fourth-year electrical engineering student Avanish Narumanch placed top three in the Undergraduate Research Awards.

Wan presented his research, “Heterogeneous 3D Integrated CIM for Factorization with Holographic Perceptual Representations,” which aims to improve AI systems' ability to perceive and reason by disentangling complex sensory signals.

"The research enhances AI systems' ability to disentangle complex sensory signals, which is critical for advancing perception and reasoning in future cognitive AI systems."

Along with the award, Wan was one of just four students selected to present their research to the SRC director and keynote speaker.

The research presents a heterogeneous 3D integrated in-memory compute engine to breakdown complex object representations. The technology is able to store and recognize complex patterns through holographic perceptual representations, which holds detailed information similar to that of a hologram.

This process can store a lot of information in a way that mimics human perception.

The system uses a technology called "memristors," which are tiny devices that can remember and adjust their electrical resistance depending on the task. These memristors have built-in stochasticity or non-volatility, combined with volatile memory as a heterogeneous system, enabling more effective simulation of natural systems and better handling of uncertainty in computing.

The results have been very promising. Wan’s design has shown a five-order magnitude increase in factorization capacity. It’s also more efficient, packing in five and a half times more computing power into almost six times less space than 2D designs, while using 20 percent less energy.

Narumanch was recognized for his research on ways to achieve faster and more energy-efficient memory devices. It focused on spintronic memory devices, which are non-volatile, low-power, and scalable electronic devices that use electron spin to store information.

The goal of the project was to reduce switching time and energy consumption without sacrificing reliability.

Both students completed the research through the JUMP 2.0 COCOSYS Center.

Wan’s work was in collaboration with senior research engineer Mohamed Ibrahim, Associate Professor Tushar Krishna, and Professor Arijit Raychowdury, along with fellow ECE Ph.D. students Che-Kai Liu (co-first author), Hanchen Yang, and Samuel Spetalnick.

This is the latest of many awards his work has received, which include being named a 2023 Machine Learning and Systems Rising Star and 2024 Cyber-Physical Systems Rising Star.

Narumanch worked on his research under the guidance of ECE Ph.D. candidate Md Nahid Haque Shazon, who works in ECE Professor Azad Naeemi’s Nanoelectronics Research Lab.

SRC TECHCON is the annual flagship technical conference hosted by the SRC. The conference draws top researchers, scientists, and a large field of students from across the United States and world to present cutting-edge research in the field of semiconductor electronics.

The award-winning paper, “HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond,” introduces an open-source infrastructure that simplifies the contribution and sharing of hardware designs.

This platform allows developers to submit their designs to a common pool, making it easy for machine learning practitioners to access the data they need to train their algorithms, ultimately driving advancements in hardware design.

The framework addresses a major challenge in applying machine learning to chip design:the scarcity of high-quality training data. By being open-source, HLSFactory encourages a wide range of contributions from the community, creating a richer dataset for researchers and developers.

“HLSFactory creates unified platform that the entire community can leverage to drive more scientific discoveries and improve design outcomes,” said Hao.

The software was developed through Hao's Software/Hardware Co-Design Lab.

ECE Ph.D. candidate Stefan Abi-Karam was the lead author on the paper. Abi-Karam previously won the Community Award at the 33rd International Conference on Field-Programmable Logic and Applications (FPL) 2023, for his work on “GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization.” The award recognized his contributions to the open-source community, underscoringthe group’s dedication to open-source tools and hardware design, according to Hao.

ECE Ph.D. candidates Rishov Sarkar and Hanqiu Chen also contributed to the paper, alongside collaborators Allison Seigler, Sean Lowe, Zhigang Wei, Nanditha Rao, and Lizy Kurian John from the University of Texas at Austin, and Aman Arora from Arizona State University.

Hao, who joined the Georgia Tech ECE faculty in 2022, specializes in efficient hardware design and machine learning algorithms. Her research focuses on reconfigurable, high-efficiency computing and developing practical electronic design automation tools. She has previously been recognized with several prestigious awards, including the NSF CAREER Award and the Intel Rising Star Faculty Award, for her groundbreaking work in hardware design research.
 

The global fellowship program is a joint initiative of the Australian, Indian, Japan, and United States governments to build ties among the next generation of scientists and technologists.

It sponsors exceptional master's and doctoral students who study science, technology, engineering, and mathematics (STEM), building a network of experts committed to advancing innovation and collaboration in the private, public, and academic sectors.

“I anticipate leveraging my experience as a Quad Fellow and connections within the Quad community towards my long-term goals of democratizing the semiconductor chip supply chain and providing education and employment opportunities to individuals from marginalized communities in STEM,” Penta said.

Penta’s doctoral research, conducted under ECE professor Muhannad Bakir in his Integrated 3D Systems Group, aims to bridge the performance-cost trade-off gap between standardized chiplet-based systems that perform better than a traditional system-on-a-chip.

He was one of 50 students to receive the fellowship world-wide, including four recipients from Georgia Tech, Penta being the only recipient from ECE.

“I am grateful to my family, friends, peers, the School of ECE and my advisor, Muhannad Bakir who supported me in the application process,” Penta said. “I am excited about this unique opportunity to connect with world leaders in the key roles for the development of the Indo-Pacific regions, specifically the semiconductor landscape."

Penta is from Hyderabad, India, and graduated with a B.E. in electrical and electronics engineering from the Birla Institute of Technology and Science (BITS), Pilani, India.

He worked on state-of-the-art transistor technologies as a process design kit engineer at Samsung Semiconductors in Bengaluru, India, before pursuing his Ph.D. at Georgia Tech in 2022.

Penta is also committed to furthering his understanding of the business side of engineering. He is part of the Technology Innovation: Generating Economic Results (TI:GER) program at the Georgia Tech Scheller School of Business, where he learns about the entrepreneurial strategies for technical ideas and innovations.
 

The awards will support the Research Experience for Undergraduates (REU) and Research Experience for Teachers (RET) programs at Georgia Tech. The REU summer internship program provides undergraduate students from two- and four-year programs the chance to perform cutting-edge research at the forefront of nanoscale science and engineering. The RET program for high school teachers and technical college faculty offers a paid opportunity to experience the excitement of nanotechnology research and to share this experience in their classrooms. 

“This NSF funding allows us to be able to do more with the programs,” said Mikkel Thomas, associate director for education and outreach. “These are programs that have existed in the past, but we haven’t had external funding for the last three years. The NSF support allows us to do more —  bring more students into the program or increase the RET stipends.”

In addition to the REU and RET programs, IMS offers short courses and workshops focused on professional development, instructional labs for undergraduate and graduate students, a certificate for veterans in microelectronics and nano-manufacturing, and community engagement activities such as the Atlanta Science Festival. 

“This is an exciting time for the HBCU CHIPS Network,” said George White, senior director for Strategic Partnerships at Georgia Tech. “This funding, and the support of Georgia Tech Executive Vice President for Research Chaouki Abdallah, is integral for the successful launch of the CHIPS Network.” 

The HBCU Chips Network works to cultivate a diverse and skilled workforce that supports the national semiconductor industry. The student research and internship opportunities along with the development of specialized curricula in semiconductor design, fabrication, and related fields will expand the microelectronics workforce. As part of the network, Georgia Tech will optimize the packaging of chips into systems. 

Read the full story by Clark Atlanta University. 

The interdisciplinary team hopes to develop a new form of wireless communication that enables a wearable patch to communicate with ingested and implanted devices regardless of their location in the body without the need for large electronic components or energy sources. If the project is successful, it could lead to the development of previously impossible minimally invasive electronic therapeutic devices such as ingestible insulin pumps and triggerable neurostimulation systems.

The IEN-EX program provides seed funding for Georgia Tech researchers to pursue “1000x” ideas within electronics or that bridge electronics with other technical domains. “1000x” ideas are those with the potential to improve one or more well-defined, but often overlooked or underappreciated, performance metrics by at least 1000x.

“Abramson and Yeo’s proposal is exactly why we created the IEN-EX program,” said Michael Filler, IEN’s associate director for research programs. “It articulates a compelling technical need at the intersection of disciplines and a targeted research program to ‘derisk’ key aspects of their vision. I am excited to see the work progress.”

Abramson is an assistant professor in the School of Chemical and Biomolecular Engineering, and his research focus is on creating implantable and ingestible drug delivery devices. Yeo is an associate professor and Woodruff Faculty Fellow in the Woodruff School of Mechanical Engineering and holds a courtesy appointment in the Coulter Department of Biomedical Engineering. Yeo’s research is on developing wearable sensor systems that can wirelessly communicate with smartphones. By combining their expertise, the duo believes they can create a new technology that will revolutionize the field of bioelectronics.

“Engineering new human-machine interfaces is critical to developing personalized biomedical devices for more easily administrable treatments with fewer side effects,” said Abramson. “We are grateful that the IEN is supporting us in this endeavor.”

Both Abramson and Yeo are part of the Materials for Biomedical Systems initiative, a group of scientists at Georgia Tech and Emory dedicated to developing targeted and effective therapies using materials and electronic systems. This is the first collaborative grant awarded to the initiative.

In addition to student research skill development, this biannual grant program gives faculty with novel research topics the ability to develop preliminary data to pursue follow-up funding sources. The Core Facility Seed Grant program is supported by the Southeastern Nanotechnology Infrastructure Corridor (SENIC), a member of the National Science Foundation’s National Nanotechnology Coordinated Infrastructure (NNCI).

Since the start of the grant program in 2014, 82 projects from ten different schools in Georgia Tech’s Colleges of Engineering and Science, as well as the Georgia Tech Research Institute and three other universities, have been seeded.

The four winning projects in this round were awarded IEN cleanroom and lab access time to be used over the next year. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in microelectronics, optoelectronics, battery technology, and novel materials for energy harvesting.

The Spring 2022 IEN Core Facility Seed Grant Award winners are:

Aluminum Oxide/Silver Microcavities for Trapping Light and Producing Polariton Coupling
PI: Juan-Pablo Correa-Baena
Student: Martin Gomez
School of Materials Science and Engineering

Facile and Scalable Fabrication of 3D-Patterned Current Collectors for Li-metal Batteries
PI: Hailong Chen
Student: Jakub Pepas
George W. Woodruff School of Mechanical Engineering/School of Materials Science and Engineering

Elucidating Connections between the Piezoelectric and Auxetic Responses of Cellulose
PI: Meisha Shofner
Student: Fariha Rubaiya
School of Materials Science and Engineering

Low-Cost, Self-Propagating, Reactive Nanoporous Ni/Al Interconnects for Low-Stress Die Assembly
PI: Vanessa Smet and Antonia Antoniou
Student: Ali Amirnasiri
George W. Woodruff School of Mechanical Engineering

The Southeastern Nanotechnology Infrastructure Corridor, a member of the National Nanotechnology Coordinated Infrastructure, is funded by NSF Grant ECCS-2025462.

Now, researchers from the Georgia Institute of Technology, in collaboration with researchers from the Massachusetts Institute of Technology (MIT), have developed a new process based on 2D materials to create LED displays with smaller and thinner pixels. Enabled by two-dimensional, materials-based layer transfer technology, the innovation promises a future of clearer and more realistic LED displays.

The team published a paper in the journal Nature in February titled, “Vertical full-colour micro-LEDs via 2D materials-based layer transfer.” Co-authors also include researchers from Sejong University in Korea, and from additional institutions in the U.S. and South Korea.

Georgia Tech-Europe Professor Abdallah Ougazzaden and research scientist Suresh Sundaram (who both also hold appointments in Georgia Tech’s School of Electrical and Computer Engineering) collaborated with researchers from MIT to turn the conventional LED manufacturing process on its head — literally. Instead of using prevailing processes based on laying red, green, and blue (RGB) LEDs side by side, which limits pixel density, the team vertically stacked freestanding, ultrathin RGB LED membranes, achieving an array density of 5,100 pixels per inch — the smallest pixel size reported to date (4 microns) and the smallest-ever stack height — all while delivering a full commercial range of colors. This ultra-small vertical stack was achieved via the technology of van der Waals epitaxy on 2D boron nitride developed at the Georgia Tech-Europe lab and the technology of remote epitaxy on graphene developed at MIT.

The study showed that the world’s thinnest and smallest pixeled displays can be enabled by an active layer separation technology using 2D materials such as graphene and boron to enable high array density micro-LEDs resulting in full-color realization of micro-LED displays.

One unique facet of the two-dimensional, material-based layer transfer (2DLT) technique is that it allows the reuse of epitaxial wafers. Reusing this costly substrate could significantly lower the cost for manufacturing smaller, thinner, and more realistic displays.

“We have now demonstrated that this advanced 2D, materials-based growth and transfer technology can surpass conventional growth and transfer technology in specific domains, such as in virtual and augmented reality displays,” said Ougazzaden, the lead researcher for the Georgia Tech team.

These advanced techniques were developed in metalorganic chemical vapor deposition (MOCVD) reactors, the key tool for LED production at the wafer scale. The 2DLT technique can be replicated on an industrial scale with high throughput yield. The technology has the potential to bring the field of virtual and augmented reality to the next level, enabling the next generation of immersive, realistic micro-LED displays.

“This emerging technology has a tremendous potential for flexible electronics and the heterogenous integration in opto-electronics, which we believe will develop new functionalities and attract industry to develop commercial products from smartphone screens to medical devices,” Ougazzaden said.

Citation: Shin, J., Kim, H., Sundaram, S. et al. Vertical full-colour micro-LEDs via 2D materials-based layer transfer. Nature 614, 81–87 (2023).

DOI: https://doi.org/10.1038/s41586-022-05612-1

Described by friends and colleagues as a true gentleman scholar, Brand made a lasting impact on those he met.

“Oliver was a gentle soul. He led IEN with empathy and advocated vigorously for his team,” said Chaouki Abdallah, executive vice president for research at Georgia Tech. “When asked to participate in large research initiatives, he was inclusive and effective. He knew when to lead, and when to support. Our recent successes in capturing large semiconductor funding are largely due to Oliver’s expertise and his leadership. I will miss him.”

“Oliver was beloved by staff, students, and faculty alike at Georgia Tech and around the world. He was a delightful person who made every occasion brighter with his kindness, dedication, passion, and intellect,” added Julia Kubanek, vice president of interdisciplinary research at Georgia Tech. “His research contributions have been far-reaching, exemplifying true transdisciplinarity. He advocated tirelessly for the career interests and needs of researchers, especially his students as well as the research faculty and staff of IEN. He made IEN a true family and we will miss him enormously.”

Brand spent more than 20 years as a member of the Georgia Tech faculty and officially began his role as executive director of IEN in 2014. In addition to leading IEN, he was a professor in the School of Electrical and Computer Engineering (ECE), the director of the Coordinating Office for the NSF-funded National Nanotechnology Coordinated Infrastructure (NNCI) as well director of the Southeastern Nanotechnology Infrastructure Corridor, one of the 16 NNCI sites.

“Oliver's impact at Georgia Tech and ECE was exceptional, as very few individuals in any academic setting can match the magnitude of his influence,” said Arijit Raychowdhury, the Steve W. Chaddick School Chair of ECE. “While he was undoubtedly a distinguished figure in the research community, Oliver was equally renowned at ECE as a mentor and educator. He had a unique ability to instill his enthusiasm for learning and exploration in you, motivating you to strive for excellence not just professionally, but more importantly as a friend and human being.”

Brand was passionate about supporting and connecting those doing basic and applied research in the areas of electronics and nanotechnology, and under his direction, IEN grew to include more than 200 faculty members at Georgia Tech from multiple colleges and departments.

"During his tenure as executive director of IEN, Oliver skillfully guided the significant expansion of Georgia Tech's world-class research programs, core facilities, and educational activities in electronics and nanotechnology,” said Michael Filler, associate director for research programs in IEN. “He was instrumental in securing the coordinating office for the NSF-supported National Nanotechnology Coordinated Infrastructure. Most importantly, Oliver was cherished by the IEN community for his unassuming yet effective approach to team building and his unwavering commitment to supporting others."

Brand was a leading researcher in the area of Micro Electro Mechanical Systems (MEMS) and, in particular, the development of micro-scale physical, chemical, and biological sensors. He used his expertise in this area to help create the NIH-funded Atlanta Center for Microsystems Engineered Point-of-Care Technologies (ACME POCT), a center focused on the development and translation of microsystems-engineered technologies including microchip-enabled devices, MEMs-based sensors, microfluidics, and smartphone-based systems. ACME POCT was instrumental in developing accurate Covid-19 tests as part of the NIH’s Rapid Acceleration of Diagnostics initiative, which was critical in slowing the spread of the virus.

“Oliver was a true pioneer in the field of microsystems engineering and nanotechnology. In more recent years, his interest expanded to the development of sensors for medical applications, and I had the good fortune of partnering with him on multiple collaborations,” said Wilbur Lam, a professor in the Coulter Department of Biomedical Engineering and Brand’s co-director of ACME POCT. “During the last several years, thanks in large part to Oliver’s leadership, our Center served as the national test validation center to verify the performance of Covid-19 diagnostics for the NIH and FDA, and Oliver and our team helped the entire country in ‘testing the tests’ to combat the global pandemic.”

In a 2022 article published by the New York Times, Bruce Tromberg, director of the NIH’s National Institute of Biomedical Engineering, called Brand and the rest of the team “absolutely heroic” for their contributions to the Covid-19 pandemic. The team also received the Outstanding Achievement in Research Program Development Award at the annual Georgia Tech Faculty and Staff Honors Luncheon in the spring of 2022 for their work in this area.

Throughout his career, Brand co-authored more than 120 publications in scientific journals and conference proceedings. He received the 2011 ECE Distinguished Mentor Award and the 2012 ECE Richard M. Bass/Eta Kappa Nu Outstanding Teacher Award, which is determined by the vote of the ECE senior class. He also served as general co-chair of the 2008 IEEE International Conference on Micro Electro Mechanical Systems, co-editor of the Wiley-VCH book series Advanced Micro and Nanosystems, was a member of the editorial board of Sensors and Materials, a co-recipient of the 2005 IEEE Donald G. Fink Prize Paper Award, and a senior member of IEEE.

He is survived by his beloved wife, Claudia, and his children Marina and Tim. He will be deeply missed by all who had the pleasure of knowing him.

The team, “Advancing Health Equity and Diagnostic Technologies (GA) Development,” will use the award to support key institutional, corporate, government, education, and community partners to create an innovative ecosystem that will inspire, develop, and translate affordable and widely available point-of-care (POC) medical technologies to advance health equity throughout the southeast.

“The Southeastern U.S. has the lowest life expectancy in the nation, and there are significant health disparities along economic, educational, racial, and geographic divisions,” said Wilbur Lam, Georgia Tech professor, principal investigator, and innovation lead. “The team will work to build an ecosystem of partners to drive use-inspired research and technology translation in the area of POC diagnostics and wearables with strong community engagement to help address these areas and advance health equity.” 

The NSF Engines program is a transformational investment for the nation, ensuring the U.S. remains in the vanguard of competitiveness for decades to come. 

"These NSF Engines Development Awards lay the foundation for emerging hubs of innovation and potential future NSF Engines," said NSF Director Sethuraman Panchanathan. "These awardees are part of the fabric of NSF's vision to create opportunities everywhere and enable innovation anywhere. They will build robust regional partnerships rooted in scientific and technological innovation in every part of our nation. Through these planning awards, NSF is seeding the future for in-place innovation in communities and to grow their regional economies through research and partnerships. This will unleash ideas, talent, pathways and resources to create vibrant innovation ecosystems all across our nation." 

Led by Lam, the team aims to build an ecosystem to drive use-inspired research and technology translation for health equity and leverage relationships with underserved Georgia communities to inspire a technology roadmap and adopt new technologies.​ An annual event and comprehensive roadmap will drive sustainable technology translation, workforce development, and systemic education.  

The awardees span a broad range of states and regions, reaching geographic areas that have not fully benefited from the technology boom of the past decades. These NSF Engines Development Awards will help organizations create connections and develop their local innovation ecosystems within two years to prepare strong proposals for becoming future NSF Engines, which will each have the opportunity to receive up to $160 million.   

Launched by NSF's new Directorate for Technology, Innovation and Partnerships and authorized by the "CHIPS and Science Act of 2022," the NSF Engines program uniquely harnesses the nation's science and technology research and development enterprise and regional-level resources. NSF Engines aspire to catalyze robust partnerships to positively impact regional economies, accelerate technology development, address societal challenges, advance national competitiveness and create local, high-wage jobs. 

View a map of the NSF Engines Development Awards. More information can be found on the NSF Engines program website.  

NSF MEDIA REQUESTS: media@nsf.gov  

GEORGIA TECH MEDIA REQUESTS: georgia.parmelee@gatech.edu  

During the conference, the IEN team, along with the National Nanotechnology Coordinating Office (NNCO) from Washington, D.C., shared the many opportunities available to educators to learn about and teach nanotechnology to their students. IEN also provided an optional tour of its micro- and nanofabrication cleanroom and its Materials Characterization Facility for conference attendees. During the tour attendees got a firsthand view of the work that takes place, the capabilities of the facility, and notable research accomplishments.

“Partnering with organizations like the NSTA gives us an opportunity to teach educators how they can incorporate nanotechnology in their classrooms,” said Mikkel Thomas, IEN’s associate director for education and outreach. “Since the conference was held in Atlanta, we were able to not only share the many programs we have with them but also showcase our facilities.”

As part of its mission to prepare the workforce of the future, IEN offers opportunities for educators to learn about and teach nanotechnology. This includes the Research Experiences for Teachers (RET) program for high school teachers and technical college faculty a paid opportunity to experience the excitement of nanotechnology research and share this experience in their classrooms. In addition, the Summer Nanoscience Institute for Middle School Teachers (NanoSIMST) is a five-day workshop in which teachers will learn about nanoscience, develop lesson plans, and receive hands-on activities that bring nanoscience into the classroom.

In addition, high school teachers that participated in IEN’S Summer 2022 RET program shared their experiences with attendees by presenting a talk at the conference. The RET program was funded by the National Science Foundation and is part of a larger program within the National Nanotechnology Coordinated Infrastructure (NNCI).

Hosted by the Institute for Electronics and Nanotechnology (IEN), Chips Day began with a recorded statement from U.S. Senator Jon Ossoff emphasizing the importance of microelectronics and semiconductor research and commending Georgia Tech for hosting the event.

The agenda included speakers with a wide variety of expertise, including Gregg Bartlett, chief technology officer of GlobalFoundries, Fayrouz Saad, director of public engagement for the CHIPS Program Office, and Victor Zhirnov, chief scientist of Semiconductor Research Corporation, among others. Multiple Georgia Tech faculty members also gave talks, including Chaouki Abdallah, executive vice president of research, and Arijit Raychowdhury, professor and chair of the School of Electrical and Computer Engineering.

During his keynote address, Bartlett discussed market trends in the semiconductor industry and the market focus and roadmap for GlobalFoundries, one of the world’s leading semiconductor manufacturers. He explained that GlobalFoundries’ core focuses are on innovation and differentiated platforms, including silicon photonics, FinFET, and feature-rich CMOS. Bartlett also noted that, due to the dynamic nature of the semiconductor market, success requires collaboration across research consortia and academic institutions, including events like Chips Day and the recent partnership on semiconductor research and workforce development signed with Georgia Tech.

"I am incredibly proud of the work that the IEN faculty, staff, students, and our industrial and governmental partners did to make Chips Day a success,” said Michael Filler, IEN’s associate director of research. “This event brought together some of the brightest minds in the semiconductor industry to share their ideas and collaborate on solutions to some of the most pressing challenges facing our field.”

Chips Day also included a ceremony honoring John Hooper (M.S. EE 1955, Ph.D. EE 1961), Georgia Tech Regents’ Professor emeritus and the founding director of the Microelectronics Research Center (MiRC), which is now IEN. It included an overview of Hooper’s career and accomplishments given by David Hertling, professor emeritus in the School of Electrical and Computer Engineering. Hooper’s children, Jeff and Christie, were also in attendance.

Hertling explained how Hooper worked with President Joseph Pettit in the 1980s to establish a strong microelectronics research presence at Georgia Tech. This included designing the MiRC, which was uniquely constructed as a resource center to enable faculty from all disciplines to engage in cutting-edge research. This model allowed Tech to attract top microelectronics talent and become a leader in the space. Thanks to Hooper’s efforts, among others, IEN is now home to one of the largest academic cleanrooms in the country and supports the research of more than 1,000 users per year from Georgia Tech, other academic institutions, industry, and government labs.

In addition to the talks, Chips Day included industry panels on economic and workforce development featuring thought leaders in these respective areas. Georgia Tech students participated in a poster session to give attendees a glimpse into their research and vendors showcased the latest products and solutions driving advancements in semiconductors and microelectronics.

“Georgia Tech is committed to advancing semiconductor research and development,” concluded Filler. “I am confident that the work that was done at Chips Day will help to ensure that the United States remains a leader in semiconductor innovation for years to come."

HKN award recipients are determined by a majority vote of the graduating class of the Georgia Tech School of Electrical and Computer Engineering (ECE) undergraduate program. They recognize the central and crucial role of professors in training and motivating future electrical, computer and allied field student engineers.

Professor Naeemi received this year’s W. Marshall Leach/Eta Kappa Nu Outstanding Senior Teacher Award. Naeemi’s research crosses the boundaries of materials, devices, circuits, and systems investigating integrated circuits based on conventional and emerging nanoelectronic and spintronic devices and interconnects.

He holds the distinction of being the inaugural recipient of the IEEE Solid-State Circuits Society (SSCS) James D. Meindl Innovators Award. He has also received accolades such as the NSF CAREER Award, SRC Inventor Recognition Award, and multiple best paper awards at international conferences.

In recognition of his innovative use of educational technology, Professor Naeemi was honored by the Institute with the Class of 1934 Outstanding Innovative Use of Education Technology Award this year. His educational tools have greatly enhanced the learning experience of students studying quantum theory and semiconductor physics/devices worldwide.

Associate Professor Krishna was awarded the Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award. His research encompasses computer architecture, interconnection networks, networks-on-chip (NoC), and deep learning accelerators, with a particular emphasis on optimizing data movement in modern computing systems.

Krishna was inducted into the High-Performance Computer Architecture (HPCA) Hall of Fame in 2022, recognizing his significant contributions to the field. He has also been honored with the Class of 1940 Course Survey Teaching Effectiveness Award from Georgia Tech (2018) and the Roger P. Webb Outstanding Junior Faculty Award from the ECE (2021).

Naeemi and Krishna’s enduring impact on the School of ECE undergraduate program and the wider engineering community will forever be recognized with their names etched on the Eta Kappa Nu Outstanding Teacher Awards display in the Van Leer Building.

“As a leader in the field of scalable electronics manufacturing and having served as associate director of IEN, Professor Filler is in an excellent position to take on this new role,” said Julia Kubanek, professor and vice president for interdisciplinary research at Georgia Tech. “He will lead IEN in continuing to support Georgia Tech faculty pursuing microelectronics and nanotechnology-sponsored research programs and collaborations. This is especially important right now given current CHIPS Act-related funding and workforce development opportunities.”

As associate director of research programs, Filler nurtured research opportunities aligned with Georgia Tech’s Strategic Plan and the Research Next missions and goals; catalyzed new interdisciplinary research communities in the area of electronics and nanotechnology; managed the portfolio of interdisciplinary research centers and programs associated with IEN; and developed strategies for industry engagement with IEN and its centers and programs.

Filler succeeds Oliver Brand who tragically passed away in April 2023 after serving as IEN’s executive director for more than a decade. During Brand’s tenure as executive director, IEN expanded its core facilities and research programs and grew to include more than 200 faculty members at Georgia Tech from multiple colleges and schools. Brand was also instrumental in securing the coordinating office for the NSF-supported National Nanotechnology Coordinated Infrastructure at Georgia Tech.

“I’m humbled and honored to take the helm of IEN at this critical time,” said Filler. “I step into this role with profound respect for the talent, dedication, and excellence of the IEN staff, faculty, and students. I am not only committed to furthering Oliver’s legacy but also capitalizing on the opportunities brought by the CHIPS Act to support the campus community and shape the future of electronics and nanotechnology."

Filler’s research focuses on the synthesis, understanding, and manufacturing of semiconductor nanowire materials and devices to enable “hyper-scalable” electronic systems. Prior to joining the IEN leadership team, Filler co-directed the Community for Research on Active Surfaces and Interfaces (CRASI) as well as the Computational Skins for Multifunctional Objects and Systems (COSMOS) research programs.

Filler earned his undergraduate and graduate degrees from Cornell University and Stanford University, respectively, prior to completing postdoctoral studies at the California Institute of Technology. He has been recognized for his research and teaching with the National Science Foundation CAREER Award, Georgia Tech Sigma Xi Young Faculty Award, CETL/BP Junior Faculty Teaching Excellence Award, and as a Camille and Henry Dreyfus Foundation Environmental Chemistry Mentor.

In addition to student research skill development, this biannual grant program gives faculty with novel research topics the ability to develop preliminary data to pursue follow-up funding sources. The Core Facility Seed Grant program is supported by the Southeastern Nanotechnology Infrastructure Corridor (SENIC), a member of the National Science Foundation’s National Nanotechnology Coordinated Infrastructure (NNCI).

Since the start of the grant program in 2014, 86 projects from ten different schools in Georgia Tech’s Colleges of Engineering and Science, as well as the Georgia Tech Research Institute and three other universities, have been seeded.

The four winning projects in this round were awarded IEN cleanroom and lab access time to be used over the next year. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in biomedical devices, nuclear engineering, phase change materials, and environmental engineering.

The Spring 2023 IEN Core Facility Seed Grant Award winners are:

Direct Lithography Micro-Optic 3D Lightfield Endoscope Module
PI: Shu Jia
Student: Corey Zheng
Wallace H. Coulter Department of Biomedical Engineering

Organic Copolymer Semiconductor for Direct Detection of Ionizing Radiation
PI: Anna Erickson
Student: Shae Cole
George W. Woodruff School of Mechanical Engineering (Nuclear and Radiological Engineering Program)

Investigating Phase Transformations in 2D Materials via in situ TEM Biasing Experiments
PI: Josh Kacher
Student: Alex Butler
School of Materials Science and Engineering

Development of Interdigitated Electrodes-Based Antimicrobial Surfaces to Prevent Biofilms
PI: Xing Xie
Student: Feifei Liu
School of Civil and Environmental Engineering

The Southeastern Nanotechnology Infrastructure Corridor, a member of the National Nanotechnology Coordinated Infrastructure, is funded by NSF Grant ECCS-2025462.

The Center for Advanced Motor BioEngineering and Research will make cutting-edge biosensors that were developed jointly by the two universities, disseminate them to neuroscientists across the country and around the world, and provide training and other resources for how to use the biosensors to explore a range of research questions.

Co-principal investigators for the project are Samuel Sober, Emory associate professor of biology, and Muhannad Bakir, Georgia Tech professor of electrical and computer engineering.

“Our technology allows you to see data that was invisible before — the electrical signals that single neurons in the spinal cord send to muscles all over the body during complex movements,” Sober says. “This information is like the missing link for trying to understand how the brain controls behavior.”

“The potential to develop new microscale technologies — with advances commonly used in semiconductor chip manufacturing — to enable scientific and medical discoveries in neuroscience is incredibly motivating,” Bakir adds. “It’s the inspiration driving this project.”

The NIH Brain Research Through Advancing Neurotechnologies (BRAIN) Initiative is aimed at revolutionizing understanding of the human brain. The five-year grant awarded to Emory and Georgia Tech is part of the BRAIN Initiative’s U24 Program, which supports projects to broadly disseminate validated tools and resources for neuroscience research.

Joining the power of two universities
 

Sober and Bakir combined the expertise of their labs to develop their breakthrough technology — biosensors that precisely record electrical signals from the nervous system to muscles that control movement.

Sober works at the forefront of describing the computational signals that the brain uses to control muscles. He’s particularly interested in how the brain learns, or relearns, motor skills — for example, in a recovering stroke patient.

Currently, clinicians use electromyography, or EMG, as a tool to diagnose the health of muscles and the motor neurons that control them. EMG typically involves the use of a tiny wire, or electrode, inserted into a muscle to record the electrical activity in the muscles.

Sober wanted a much finer resolution of data and more practical methods for his research on how the brain activates and controls muscles in songbirds as they learn to sing. He needed devices tiny enough to implant in the birds’ vocal cords. The devices also needed flexibility and strength to bend with the movement of a muscle without breaking. And each had to contain an array of gold electrodes to gather high-resolution data.

Enter Bakir, who works at the frontier of flexible electronics.

The unique collaboration between the two researchers allowed them to forge new scientific territory. “We leveraged state-of-the art microfabrication tools to solve a problem deeply rooted in the life sciences,” Bakir says.

A tiny device delivers big-picture insights
 

The researchers’ teams developed flexible electrode arrays that include microscopic 3D contacts for recording muscle activity. Each microarray includes one or more threads, about the width of a human hair. The devices are so tiny that they can be sewn into a muscle like a suture thread or even loaded into a syringe and injected into the muscle, making them minimally invasive. An earlier version of these technologies was developed in the Georgia Tech PhD work of Muneeb Zia, who is currently a Georgia Tech research faculty member.

They dubbed the new devices “Myomatrix arrays,” incorporating the Greek work “myo” for muscle. The high-tech biosensors allow researchers for the first time to record high-resolution data across large groups of muscles simultaneously while subjects perform complex behaviors.

To help test and refine the devices, the researchers have already given them to more than 100 different labs in the United States, Canada, Europe and Asia where they have been used to explore neuroscience questions in a variety of species — from the crawling muscles in a caterpillar to the locomotion of a mouse leg and the reaching movements of a monkey’s arm.

Setting the stage for clinical use
 

Comparing data from across species will help speed discoveries of the normal functioning of the neuromuscular system. That sets the stage for the Myomatrix arrays to become a valuable tool in clinical settings.

The researchers recently completed initial experiments with the biosensors in healthy humans, marking another major step forward.

The devices may eventually enable doctors to diagnose a neurogenerative disease earlier so that interventions can start sooner. The sensitivity of the Myomatrix arrays could also potentially measure any improvement a patient may experience after taking a drug or other therapy.

The BRAIN Initiative grant will allow the researchers to disseminate the technology to even more labs to do longer-term studies.

“A lot of times when new scientific technology gets developed it can be jealously guarded by the inventors for years,” notes Sober. “One of the big impacts of this technology is that we’ve already been giving it away as much as possible in an open-science way. And that’s helped us in turn to keep improving the technology because we are getting so much feedback.”

The Georgia Tech team will continue to fabricate and package the Myomatrix arrays using advanced microelectronic technologies in special “cleanrooms” where the air is purified to such extreme levels that the number of dust particles in the environment can be counted.

A global educational component 

The Emory team will continue to work on assembling and testing the devices, in addition to training users from around the world in the use of technology via Zoom meetings and in-person sessions.

“This project is not just about making and disseminating the devices; it’s also a teaching mission with a big educational component,” Sober says. “We believe that this technology is going to have a major impact on the field of motor neuroscience.”

The project members will work with the NIH to ensure that the devices are distributed to a diverse range of users, institutions and research areas, consistent with the BRAIN Initiative’s goal to make the latest neuroscience tools more broadly accessible.

“We’ll be serving scientific communities that historically have not had access to such technologies or manufacturing capabilities,” Bakir says. “Emory and Georgia Tech are opening the doors to our facilities and to our expertise so that anyone who works in motor neuroscience can access and leverage these new devices, which require hundreds of millions of dollars to build and equip. This democratization of the technology will help to advance motor neuroscience at a more rapid pace.”

This story was originally published by Emory University. Check out their article here.

Photo Caption
Co-principal investigators for the project are (left) Samuel Sober, Emory associate professor of biology, and Muhannad Bakir, Georgia Tech professor of electrical and computer engineering. They combined the expertise of their labs to develop their breakthrough technology.

— Ann Watson, Emory Photo/Video

EPS Distinguished Lecturers are selected from among EPS Fellows, award winners, and society leaders. Selected experts are highly regarded members of the technical community and renowned experts in their respective fields. They are invited to deliver lectures and courses at EPS events, including chapters, conferences, workshops, symposia, and IEEE Student Chapter events.

Notably, Tentzeris has previously served as a Distinguished Lecturer for the IEEE Microwave Theory and Technology Society (MTT) and the IEEE Council on Radio Frequency Identification (CRFID), highlighting his exceptional contributions across multiple societies within IEEE (Institute of Electrical and Electronics Engineers).

Since 2016, Tentzeris has held the Ken Byers Professorship in flexible electronics in ECE. He joined the faculty in 1998 and leads the ATHENA Research Group. Tentzeris’ research specializes in 3D Printed RF electronics, antennas and modules, flexible and conformal electronics and phased antenna arrays up to sub-THz, origami and morphing electromagnetics, Highly Integrated/Multilayer Packaging for RF and Wireless Applications using ceramic and organic flexible materials, “green” paper-based RFIDs and sensors, nanostructures for RF, wireless sensors, energy harvesting and wireless power transfer/wireless power grids, reconfigurable intelligent metasurfaces, heterogeneous integration and SOP-integrated (UWB, multiband, conformal) antennas.

As an EPS Distinguished Lecturer, Tentzeris will deliver lectures on Smart Cities, Smart Agriculture, Smart Manufacturing/Industry 4.0, and Digital Twin domains.

The 12 projects received a total of $27 million in investment, supporting the use of knowledge learned from studying the Rules of Life — the complex interactions within and between a broad array of living systems across biological scales, and time and space — to tackle pressing societal challenges, including clean water, planet sustainability, carbon capture, biosecurity, and antimicrobial resistance to antibiotics. The Georgia Tech-related projects received a total of $7.7 million.

"The enormous opportunity to apply biological principles to solving the biggest problems of today is one we cannot take lightly," said Susan Marqusee, NSF assistant director for Biological Sciences. "These projects will use life to improve life, including for many underprivileged communities and groups."

The Georgia Tech-led projects include:

• Co-Producing Knowledge, Biotechnologies and Practices to Enhance Biological Nitrogen Fixation for Sustainable Agriculture. $2.67 million (Georgia Tech and Worcester Polytechnic Institute, award 2319430)

The project’s principal investigator is Lily Cheung, assistant professor of ChBE@GT, and the co-principal investigators are Shuichi Takayama, professor of biomedical engineering at Georgia Tech, and William San Martín, assistant professor of global environmental science, technology, and governance at Worcester Polytechnic Institute.

The researchers will address food security through low-cost technology based on biological principles to increase nitrogen content in soils and improve crop production on marginal lands.

• Next-Generation Biological Security and Bio-Hackathon, $2.81 million (Georgia Tech and Massachusetts Institute of Technology, award 2319231).

The project’s principal investigator is Corey Wilson, professor of ChBE@GT, and the co-principal investigators are Matthew Realff, professor of ChBE@GT, and Christopher Voigt, professor of biological engineering at Massachusetts Institute of Technology.

The researchers will create programmable, biological combination lock methods — "on and off" states — for using synthetic biology safely, containing potentially dangerous organisms and protecting valuable ones.

• Synthetic Protocell Communities to Address Critical Sensing Challenges, $2.23 million (Georgia Tech, award 2319391).

The project’s principal investigator is Mark Styczynski, professor of ChBE@GT, and the co-principal investigators are Shuichi Takayama, professor of biomedical engineering at Georgia Tech; Brian Hammer, associate professor of biological sciences at Georgia Tech, and Neha Garg, assistant professor of chemistry and biochemistry at Georgia Tech.

The researchers will create synthetic "protocells" enabling the development of a highly sensitive, field deployable analysis system that could be used for many applications such as measuring micronutrient deficiencies in undernourished populations.

The day began at the Institute for Electronics and Nanotechnology (IEN), where students learned about ferrofluids, thin films, magic sand, measuring their height in nanometers, and the size and scale of the universe. They also visited the Materials Characterization Facility for an introduction to characterization and demonstrations of some of its tools, including the digital optical microscope and atomic force microscope. The IEN portion of the day concluded with a window tour of the IEN cleanroom and an opportunity to gown up in “bunny suits,” the standard uniform worn by cleanroom users.

“We’re committed to developing the pipeline of the future microelectronics workforce,” said Mikkel Thomas, assistant director of workforce development at IEN. “This includes K-12 students who may not know what microelectronics are, or the career paths associated with them. We were glad to host part of Chip Camp and introduce these students to IEN.”

Following a lunch break, campers visited the Invention Studio makerspace, where they built their own rockets — and then launched them in Tech Green.

Micron Chip Camp is a global initiative offering opportunities to students in the U.S. and Asia both in person and online. Micron teamed up with STE(A)M Truck, Atlanta's leader in hands-on STEAM education, for the Georgia session.

In addition to hosting students for camps, IEN provides a variety of outreach programs for K-12 and adult learners, which include short courses and seminars, research experiences for undergraduates, and research experiences for teachers. To learn more about these opportunities, visit research.gatech.edu/nano/workforce-development.

Led by biomedical engineer Gabe Kwong, the project will map the unique cellular profiles of cancer cells and leverage that knowledge to build new bioengineered sensors to detect those profiles. The goal is to create a new kind of multi-cancer early detection test that would allow oncologists to start treating the tumors sooner, when they’re still small and most responsive.

The funding announced Sept. 26 is from the new Advanced Research Projects Agency for Health (ARPA-H) and part of the Biden administration’s efforts to cut the cancer death rate in half in 25 years.

Read the full story on the College of Engineering website.

The award-winning paper was co-authored by Motorola Solutions Foundation Professor Sung Kyu Lim and Yi-Chen Lu (ECE Ph.D. ’23, currently at Apple), in collaboration with a team from Synopsys, Inc comprised of Wei-Ting Chan, Deyuan Guo, Vishal Khandelwal, and Sudipto Kundu.

The research, titled “RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning,” received Best Paper recognition out of 1,157 submissions. It presents a Reinforcement Learning (RL) agent in Concurrent Clock and Data (CCD) optimization — a technique used in modern computer design tools to improve the performance and reliability of digital circuits. The introduction of an RL agent enables systems to intelligently enhance their ability to correctly rank violating endpoints according to machine learning-based optimization strategies. This contributes to an optimization flow that maximizes the overall efficiency and effectiveness of the system's performance.

The team was presented the award at DAC 2023 — the flagship conference in electronic design automation (EDA) — in San Francisco this July.

Last year, Lim and his research team were presented with the Donald O. Pederson Best Paper Award for their research on Compact-2D physical design tools at DAC. The work was recognized as the best paper published in IEEE’s Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD), the flagship journal of the IEEE Council on Electronic Design Automation (CEDA).

Top photo caption: The team receiving the Best Paper Award For Research this July at the Design Automation Conference. Left to right: Sung Kyu Lim, Wei-Ting Chan, Yi-Chen Lu, and Deyuan Guo (not pictured: Vishal Khandelwal, and Sudipto Kundu).

The National Cancer Institute estimates more than 600,000 people will die of cancer in the U.S. in 2023, but the researchers say their project could reduce the number of U.S. cancer-related deaths by 50%.

Josiah Hester, an associate professor in Georgia Tech’s School of Interactive Computing, is a co-principal investigator on the project and is responsible for the sensing and computing technology in the implantable device. He will also assist with large-scale experimentations and coordinate the integration of the technology.

Hester specializes in developing sensing, battery-free, and sustainable technology for wearable and mobile devices. He previously worked on a team that developed the first battery-free handheld gaming console.

Celine Lin, associate professor in Georgia Tech’s School of Computer Science, is working with Hester to develop ultra-energy-efficient chips for signal processing and embedded control. Together, they will develop a robust platform that is energy-efficient enough to last for months.

The device contains genetically engineered cells catered to each individual patient that attack and eliminate cancer cells in the body. Thanks to Hester’s efforts, the device can monitor a patient’s cancer and adjust the dosage of the genetically engineered cells in real time.

“We must keep the cells alive to fight the cancer, and we must understand and control our progress in delivering this treatment,” Hester said. “Releasing too many cells could be toxic, and not releasing enough could be ineffective.”

Omid Veiseh, a bioengineer at Rice University, serves as principal investigator on the project and genetically engineers the cancer-attacking cells.

Along with Hester and Lin, Veiseh’s team consists of 19 co-PIs from the University of Texas, Stanford University, Carnegie Mellon University, Northwestern University, the University of Houston, and Johns Hopkins University.

The researchers named their project Targeted Hybrid Oncotherapeutic Regulation (THOR) and named the implantable device Hybrid Advanced Molecular Manufacturing Regulator (HAMMR).

Over the next five years, the team will test this unique approach to cancer treatment on patients with ovarian, pancreatic, and other difficult-to-treat cancers. They expect to not only improve immunotherapy outcomes for patients, but to make treatment more accessible.

Hester said once the device is surgically implanted, it is designed to remain in the body for six months or more, making it a minimally invasive alternative to chemotherapy.

“If you’re a patient with advanced stage cancer, you might be going in weekly to do various invasive and painful procedures,” Hester said. “This implant could remove a lot of the burden and make cancer treatment more accessible.

“Instead of driving three or four hours to get your treatment — which is expensive, and you may not be able to do it — you can have this implant. You come for the surgery, then you leave, and it stays with you for six months. The localized treatment should reduce the pain and terrible symptoms that chemotherapy and other systemic treatments cause in current protocols.”

ARPA-H is a federal funding agency established in 2022 to support research that has “the potential to transform entire areas of medicine and health.” THOR is the second program to receive funding from ARPA-H after its first Open Broad Agency Announcement solicitation for research proposals.

The first funding contract went to a team of researchers led by Philip Santangelo, a professor in the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory. Their project, known as CUREIT, uses mRNA drugs to activate or switch off certain genes to help the immune system fight cancer and other chronic diseases.

Lam is one of 100 newly elected members of the Academy for 2023, an honor reserved for people who’ve made major contributions to medicine, healthcare, and public health. He joins a roster of just 2,400 or so individuals. Membership is considered one of the highest recognitions in health and medicine.

“This honor is extremely humbling because it’s given to me as one person. But it really reflects the team effort that’s surrounded me all these years,” said Lam, W. Paul Bowers Research Chair in the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory University.

“If you look at all the work that they’re recognizing me for, it starts with my laboratory, then goes beyond — into the centers that we’ve developed related to diagnostic technologies, and then, all the work that we’ve done for the National Institutes of Health during the pandemic.”

New NAM members are nominated and elected by current members, and they’re expected to contribute to National Academies activities providing independent analysis and advice to help the nation tackle complex problems.

Lam, who is a pediatric hematologist/oncologist at Children’s Healthcare of Atlanta in addition to a researcher, was cited “for outstanding contributions in point-of-care, home-based, and/or smartphone-enabled diagnostics that are changing the management of pediatric and hematologic diseases as well as development of microsystems technologies as research-enabling platforms to investigate blood biophysics.”

Read the full article on the College of Engineering website

“Hosting Nanowire Week 2023 at Georgia Tech’s Global Learning Center has been an extraordinary experience,” said Michael Filler, interim executive director for the Institute of Electronics and Nanotechnology. “This conference has highlighted the interdisciplinary nature of nanowire research, bringing together scientists and engineers from around the globe. Their shared insights and discoveries are not just academic achievements; they are the building blocks for technological innovations that could transform industries and improve everyday life." Filler served as conference chair and worked with an international steering committee to plan the event.

With more than 115 speakers and poster presenters representing more than 20 countries, the agenda reflected the diverse and evolving landscape of nanowire research. Topics included nanowire growth and manufacturing, electron transport and doping in nanowires, quantum behavior and devices, energy conversion and storage, and more.

Nanowires are 1D nanostructures with a wide range of potential uses. The ability of bottom-up growth methods to ‘program’ nanowire structure and composition with nanoscale precision opens the door to novel materials properties and functionality.

Nanowire Week takes place every 18 months and brings together leading experts in the world of nanowires. Past locations include Lund, Sweden; Hamilton, Canada; Pisa, Italy; and Chamonix, France.

In addition to student research skill development, this biannual grant program gives faculty with novel research topics the ability to develop preliminary data to pursue follow-up funding sources. The Core Facility Seed Grant program is supported by the Southeastern Nanotechnology Infrastructure Corridor (SENIC), a member of the National Science Foundation’s National Nanotechnology Coordinated Infrastructure (NNCI).

Since the start of the grant program in 2014, 90 projects from ten different schools in Georgia Tech’s Colleges of Engineering and Science, as well as the Georgia Tech Research Institute and three other universities, have been seeded.

The four winning projects in this round were awarded IEN cleanroom and lab access time to be used over the next year. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in electronic devices, geochemistry, bio-inspired design, and solid state physics.

The Fall 2023 IEN Core Facility Seed Grant Award winners are:

Using Zircon (U-Th)/Pb Geochronology to Trace the Source of Himalayan Megafloods
PI: Karl Lang
Student: Srinanda Nath
School of Earth and Atmospheric Sciences

Material Characterization of Keratin-based Barbules with Hygroscopic Coiling-uncoiling Behaviors and Biomimetic Fabrication of Artificial Hygromorphic Barbules
PI: Saad Bhamla
Student: Nami Ha (ME/BioE)
School of Chemical and Biomolecular Engineering

Ultra-high Mobility Semiconducting Graphene Device Fabrication
PI: Claire Berger and Walt de Heer
Student: Will Griffin
School of Physics

Extracting the Effect of Electrode-Ferroelectric Interface on Photovoltaic Efficiency
PI: Lauren Garten
Student: Marshall Frye
School of Materials Science and Engineering

The Southeastern Nanotechnology Infrastructure Corridor, a member of the National Nanotechnology Coordinated Infrastructure, is funded by NSF Grant ECCS-2025462.

His talk marks the beginning of an annual lecture series established in memory of Professor Oliver Brand, who passed away in April. Brand had served as the executive director of the Georgia Tech Institute for Electronics and Nanotechnology (IEN) since 2014.

“Oliver’s work, especially in microelectromechanical systems and CMOS-based microsystems, is widely respected in the community, with more than 190 publications to his name,” said Mike Filler, IEN’s interim executive director. “Andreas Heirlemann’s scientific contributions embody the innovative spirit and excellence that Oliver championed throughout his life.”

In addition to their research connection, Heirlemann also had a personal connection with Brand. They worked closely together in the same research lab at ETH Zürich for three years before Brand moved to Georgia Tech.

“What impressed me most about Oliver was his innate friendliness,” said Hierlemann. “He was always supportive. He was always motivating students. I never heard a harsh word come out of him. He had an extremely positive outlook on life that I learned to admire. That is what I take as his legacy.”

Hierlemann’s lecture was presented in two parts. The first focused on microfluidics, hanging drop networks, and microphysiological systems. Microphysicological systems are 3D cell assemblies, or membrane structures like organs, that occur naturally in the body or are grown with stem cells. These systems allow for comprehensive testing and studying tissue interactions. 

The second part of his talk focused on high-density microelectrode array systems, including neuronal systems characterization and the handling and use of neurons.

Brand spent more than 20 years as a member of the Georgia Tech faculty. In addition to leading IEN, he was a professor in the School of Electrical and Computer Engineering, director of the Coordinating Office for the NSF-funded National Nanotechnology Coordinated Infrastructure (NNCI), and director of the Southeastern Nanotechnology Infrastructure Corridor, one of the 16 NNCI sites.

Brand united researchers in the fields of electronics and nanotechnology, fostering collaboration and expanding IEN to include more than 200 faculty members. In addition to his respected work in the field of microelectromechanical systems, he is remembered for his kindness, dedication, and unwavering support toward all who knew him.

“We are proud to join forces with Georgia Tech, home to some of the nation’s top programs, to expand students’ opportunities in STEM education,” said Scott DeBoer, executive vice president of Technology and Products at Micron. “This collaboration will help push the boundaries in memory technology innovation and ensure we prepare the workforce of the future.”

“We believe that when academia and industry converge, the best ideas flourish into game-changing innovations,” said Chaouki T. Abdallah, executive vice president for Research at Georgia Tech. “The synergy between Micron and Georgia Tech has already been tremendously fruitful, and we are so excited for the boundless opportunities on our shared horizon.”

“The signing of the master research agreement represents a significant step towards increasing additional collaboration pathways between Micron and GT including the joint pursuit of major federal funding activities, technology transfer, student internships and technology transfer,” said George White, senior director of Strategic Partnerships at Georgia Tech.

The first project under the agreement is already underway. Saibal Mukhopadhyay, professor in the School of Electrical and Computer Engineering, is leading the research efforts titled “Configurable Processing-In-Memory.” This cutting-edge research will enable memory devices to work faster and more efficiently.

"We’re thrilled to have Professor Bakir joining us as the new director,” said Michael Filler, IEN’s interim executive director. “His wealth of experience and pioneering work in advanced packaging make him an excellent fit to lead the PRC into an exciting new era of innovation and technological impact.”

Originating as a National Science Foundation Engineering Research Center in 1993, the PRC is a national leader in the advanced packaging of microelectronics. Advanced packaging in microelectronics refers to innovative techniques for merging and interconnecting multiple components within a single electronic entity. This enables more powerful, efficient, and versatile microelectronic systems, driving innovation across various industries. The Center conducts research and education in all aspects of electronics packaging, including design, materials, process, assembly, thermal management, and system integration. Its work is driven by a wide range of applications, such as high-performance computing, artificial intelligence, automotive systems, wireless communications, and space exploration.

“I am honored for the opportunity to lead the PRC and look forward to working with the campus community and our industry, government, and academic partners on a research agenda that tackles the multifaceted challenges in advanced packaging and heterogeneous integration,” said Bakir.

As director, Bakir will guide the PRC into the future of advanced packaging through his vision and expertise. He is responsible for ensuring that the PRC's world-class facilities support the emerging needs of advanced packaging of microelectronics and supports members of the campus community who uses these facilities.

“We are excited to lead the science and engineering that culminates in system level prototyping and demonstrators for AI, mm-wave, photonic systems, and beyond,” he said.

Bakir, who also serves as the Dan Fielder Professor in the School of Electrical and Computer Engineering and leads the Integrated 3D Systems Group, brings a wealth of experience to his new role as PRC director. He and his research group have received more than 30 paper and presentation awards including seven from the IEEE Electronic Components and Technology Conference, four from the IEEE International Interconnect Technology Conference, and one from the IEEE Custom Integrated Circuits Conference. His group was also awarded the 2014 and 2017 Best Papers of the IEEE Transactions on Components Packaging and Manufacturing Technology.

Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium. He is the co-recipient of the 2018 IEEE Electronics Packaging Society Exceptional Technical Achievement Award “for contributions to 2.5D and 3D IC heterogeneous integration, with a focus on interconnect technologies.” He is also the co-recipient of the 2018 McKnight Foundation Technological Innovations in Neuroscience Awards. In 2020, Bakir received the Georgia Tech Outstanding Doctoral Thesis Advisor Award.

He serves as a senior area editor for the IEEE Transactions on Components, Packaging and Manufacturing Technology and was previously an Editor for IEEE Transactions on Electron Devices. He has also served as a distinguished lecturer for IEEE EPS.

Learn more about PRC

The event brought together students, faculty, and professionals in the microelectromechanical systems research community to celebrate Brand’s contributions to the field and explore cutting-edge research.

“As a fellow academic, looking at his contributions, they’re remarkable,” said Mike Filler, interim executive director of the Institute for Electronics and Nanotechnology (IEN). “But then what put it over the top was his humanity. He supported every member of the community; he believed in people and had their best interests in mind.”

The seven speakers included research colleagues, graduate students and technical staff who worked closely with Brand throughout his career. They reminisced about Brand and discussed the research and technical achievements they collaborated on with him.

Brand spent more than 20 years as a member of the Georgia Tech faculty. In addition to leading IEN, he was a professor in the School of Electrical and Computer Engineering, director of the Coordinating Office for the NSF-funded National Nanotechnology Coordinated Infrastructure (NNCI), and director of the Southeastern Nanotechnology Infrastructure Corridor, one of the 16 NNCI sites.

Brand united researchers in the fields of electronics and nanotechnology, fostering collaboration and expanding IEN to include more than 200 faculty members. In addition to his respected work in the field of microelectromechanical systems, he is remembered for his kindness, dedication, and unwavering support toward all who knew him.

Each instrument can measure elemental variability in both dissolved aqueous samples as well as solids/minerals via laser ablation microsampling from a Teledyne Iridia laser ablation system. Together the system can measure isotopes at precision in elemental systems from Li and U.

Planned applications include: (1) high-resolution measurements of Ca, Sr, Ba, Mg, and B elemental and isotopic variability in seawater and marine and terrestrial carbonates for paleoclimate reconstructions, (2) (U-Th)/Pb dating and Hf isotope measurements to study the origin of critical mineral deposits, with a potential engineering application and the development of novel methods for increasing precision/accuracy and minimizing sample consumption during routine analyses of water quality and environmental contamination.

The MCF welcomes users interested in these and other potential applications of this new facility to their scientific and engineering research to contact David Tavakoli (atavakoli6@gatech.edu).

Now the U.S. Department of Energy (DOE) is getting on board with Yushin’s Georgia Tech startup as part of federal efforts to reinvigorate tech manufacturing in the United States.

DOE awarded Sila Nanotechnologies $100 million this fall to support the company’s new factory in Moses Lake, Washington, and help Sila hire and train up to 300 workers for the facility. It was one of 21 projects funded in domestic battery materials processing and manufacturing.

“It’s our mission to help move America away from being energy dependent and become a leader in the energy transformation,” said Yushin, the company’s chief technology officer and a faculty member in the Georgia Tech School of Materials Science and Engineering. “With this funding, Sila will deliver proven, clean energy technology and world-scale manufacturing to revitalize the industry and gain independence.”

Birthed from Yushin’s research on lithium-ion batteries, Sila manufactures next-generation materials and a silicon anode technology that boosts battery energy density by 20%. The silicon anodes are a drop-in replacement for graphite anodes in lithium-ion batteries. The new facility is projected to produce enough capacity to power 200,000 electric vehicles by 2026. Sila has inked a deal with Mercedes-Benz to use the company’s technology, starting with G-Class vehicles.

Read the full story on the College of Engineering website.

This annual event aims to inspire the next generation of engineers and scientists and share the breadth of Georgia Tech’s research activities with the local community. Last year more than 500 attendees, ranging from toddlers to retirees, explored the campus and participated in hands-on STEAM activities, tours, and demonstrations designed to engage and educate participants. While attendees were able to get a glimpse into one of the nation’s most research-intensive universities, the community-wide event also allowed Georgia Tech students, researchers, and staff members the opportunity to share their work with the public.

Seeking Demo Groups

To continue the success of Science and Engineering Day, we need members of the Georgia Tech community — including student groups, labs, staff, and faculty — to participate in this year’s event. Last year, 26 units and student organizations across campus provided activities in biology, space, art, nanotechnology, paper, computer science, wearables, bioengineering, and chemical engineering just to name a few.

Taking part in Science and Engineering Day gives Georgia Tech students and researchers a unique opportunity to share their work with the community and inspire attendees. Demo space is limited, so reserve your spot today. Opportunities include hands-on STEAM activities, exhibits, demonstrations, and opportunities to meet student researchers. If you have questions about how you can participate, reach out to Leslie O’Neil. All demo groups must register by February 20, 2023.

The Atlanta Science Festival is engineered by Science ATL and community partners, with major support from founders Emory University, Georgia Tech, and the Metro Atlanta Chamber, and from sponsors UPS, International Paper, Georgia Power, Cox Enterprises, Lockheed Martin, Lenz Marketing, and Mercer University.

Learn more and register to demonstrate at research.gatech.edu/ATLscifestGTday23

To enable this research, IMat leadership has supported strategic interdisciplinary initiatives since 2021. Each initiative has a dedicated faculty lead to guide the initiative and prepare teams to compete for mid- and large-scale, multi-investigator research centers with academic, national laboratory, and industry partners. Initiative leads also work to increase the campus’ collaborative spirit by working with other Interdisciplinary Research Institutes, campus units, and the Georgia Tech Research Institute to design and support research programs. Initiative leads serve for one academic year and may be considered for renewal based on their progress in achieving community-building goals and their impact on IMat and the materials innovation ecosystem at Georgia Tech.

“The goal of our initiative lead program is to provide support for these strategic interdisciplinary research areas,” said IMat Executive Director Eric Vogel. “Now that we are in the third year of the program, we have seen significant growth in many of the initiatives we have supported, including batteries and energy storage and materials laboratories for the future.”

Materials for Energy Storage Initiative to Become Georgia Tech Advanced Battery Center

Matthew McDowell has served as an IMat initiative lead in Materials for Energy Storage, a joint initiative with the Strategic Energy Institute (SEI), since the program began in 2021. With the nation’s increased focus on electric vehicles, battery storage technologies have gained significant attention since McDowell launched his initiative. In addition, the state of Georgia is becoming the epicenter of the battery belt of the Southeast, with more than $25 billion invested or announced in EV-related research in the past three years. The Materials for Energy Storage Initiative has worked to highlight Georgia Tech’s strong energy storage research community and how it can help shape the development of next-generation energy storage devices. In 2023, McDowell and his team hosted Georgia Tech Battery Day, a sold-out event that brought together more than 230 energy researchers and industry representatives to advance energy storage technologies.

This year, the Materials for Energy Storage Initiative will become the Georgia Tech Advanced Battery Center, with McDowell and Gleb Yushin as co-directors. The new center will build community at Georgia Tech, work to enhance relationships with industrial partners, and create a new battery manufacturing facility on Georgia Tech’s campus. The Advanced Battery Center is the latest initiative to gain external funding and become a center, in addition to the Center for Organic Photonics and Electronics and the Georgia AI Manufacturing coalition led by former IMat Initiative Lead Aaron Stebner.

Meet the 2023-24 IMat Initiative Leads

Materials for Solar Energy Harvesting and Conversion

Juan-Pablo Correa-Baena is an assistant professor and the Goizueta Early Career Faculty Chair in the School of Materials Science and Engineering. He holds a B.S. in management and engineering and an M.S. and Ph.D. in environmental engineering, all from the University of Connecticut. Correa-Baena runs the Energy Materials Lab at Georgia Tech, which focuses on understanding and control of crystallographic structure and effects on electronic dynamics at the nanoscale of low-cost semiconductors for optoelectronic applications.

As an initiative lead, Correa-Baena will work to create a community around solar energy harvesting and conversion at Georgia Tech. He aims to integrate photovoltaic, photodetectors, and related devices into IMaT-related research; energize research in these areas at Georgia Tech at large; and consolidate the expertise of the many research groups working on or around photovoltaics/photodetectors that will allow us to target interdisciplinary research funding opportunities. He also wants to provide an official link at Georgia Tech for industry partners to interact with faculty on photovoltaics, with a special aim at First Solar and QCells, the largest solar panel factory in the western hemisphere.

Autonomous Research for Materials

Mark Losego is an associate professor, MSE Faculty Fellow, and Dean’s Education Innovation Professor in the School of Materials Science and Engineering. He holds a B.S. from Penn State University and an M.S. and Ph.D. from North Carolina State University, all in materials science and engineering. The Losego research lab focuses on materials processing to develop novel organic-inorganic hybrid materials and interfaces for microelectronics, sustainable energy devices, national security technologies, and advanced textiles.

As an IMat initiative lead, Losego will help build a community at Georgia Tech that works toward developing autonomous and intelligent systems (robots) that execute physical experiments — processing, characterizing, and measuring the properties of materials — and then uses this knowledge to iteratively and intelligently execute subsequent experiments that produce new knowledge about process-structure-property relations, which inform materials discovery and design. He also hopes to learn what technical questions, training opportunities, or other incentives would compel Georgia Tech roboticists to collaborate with materials scientists to develop autonomous materials discovery systems and what the Georgia Tech materials community can do with emerging, inexpensive, and simple-to-use robotics systems to drive autonomous materials discovery.

Macromolecular Materials at Biotic and Abiotic Interfaces

Valeria Tohver Milam is an associate professor and MSE Faculty Fellow in MSE. She holds a B.S. from the University of Florida, and an M.S. and Ph.D. from the University of Illinois Urbana-Champaign, all in materials science and engineering. Her research interests are in DNA-based ligands for molecular, macromolecular, and mesoscale targets and bio-inspired colloidal assembly for multifunctional drug delivery vehicles and colloidal-based sensing. She also leads the Milam Group.

As an IMat initiative lead, Milam will work to build an inclusive and active community across and beyond Georgia Tech to identify emerging research directions in macromolecular materials. Macromolecules, whether natural, bio-inspired, or completely synthetic, hold promise for enabling the next generation of materials to successfully perform at biotic as well as abiotic interfaces. Motivated by broad applications ranging from health to the environment, this initiative will bring together experimental and computational engineers and scientists focused on fundamental studies of macromolecular systems. The goal is to identify pathways to novel compositions, structures, synthesis, and characterization approaches to designing and implementing macromolecular materials.

Mechanical Metamaterials

D. Zeb Rocklin is an assistant professor in the School of Physics. He holds a B.Sc. in physics and economics from the California Institute of Technology and a Ph.D. in physics from the University of Illinois Urbana-Champaign. His research interests include soft condensed matter physics and adjacent fields like statistical physics, physics of living systems, and hard condensed matter with a particular focus on the relationship between the geometric structure of a system and its mechanical response. He leads the Rocklin Group at Georgia Tech, which focuses on the structure and motion of soft materials.

As an IMat initiative lead, Rocklin aims to bring faculty together within the Colleges of Sciences, Engineering, and Design to develop, characterize, and apply novel metamaterials — those with programmed structures above the atomic scale, blurring the line between material and machine. They can reveal fundamentally new physics while also incorporating new functionality for flexibility, strength, and intelligent processing of mechanical force and energy.

Materials and Interfaces for Catalysis and Separations | Marta Hatzell
Marta Hatzell is an associate professor in the George W. Woodruff School of Mechanical Engineering and the School of Chemical and Biomolecular Engineering. She earned a B.S., M.S., and Ph.D. in mechanical engineering and an M.Eng in environmental engineering from Pennsylvania State University. Her research group focuses on exploring sustainable catalysis and separations with applications from electrofuels and solar fuels to desalination.

To mitigate issues related to climate change, there is a societal push to reach net zero carbon emissions by 2050. Thermal separations and catalysis are the primary sources of carbon emissions in industry today. Thus, there is a growing research focus on developing next-generation materials for net zero catalysis and separation processes. In year one, Hatzell aided in bringing together faculty for two center-level proposals through the NSF and DOE. She also helped run a workshop to disseminate information regarding the DOE Earthshot call. In her second year as an initiative lead, Hatzell will continue to bring faculty together who are working on materials-related issues aimed at decarbonizing industrial separations and catalysis, identify the bottlenecks for new materials, and assess their long-term impacts.

Quantum Responses of Topological and Magnetic Matter | Zhigang Jiang
Zhigang Jiang is a professor in the School of Physics. He holds a B.S. in physics from Beijing University and a Ph.D. in physics from Northwestern University. He was also a postdoctoral research associate at Columbia University jointly with Princeton University and NHMFL from 2005 to 2008. His research interests are in the quantum transport and infrared optical properties of topological and magnetic materials. His current projects include infrared magneto-spectroscopy of topological semimetals, band-engineering topological phases in metamorphic InAsSb ordered alloys, and developing new materials for portable, real-time radiation monitoring devices.

The goals of this initiative are twofold: first, to anchor, develop, and promote the community of researchers working on the fundamental magnetic properties of quantum materials. And second, to connect these researchers to application-centric initiatives led by other science or engineering colleagues across Georgia Tech. The focus will be on fundamental research progress in topological and magnetic matter and to communicate their importance, relevance, and significance to Georgia Tech’s research audience. In addition, this initiative aims to leverage fundamental discoveries in quantum materials and explore how they can be translated in their own right into quantum systems with new functionalities for spintronics, qubits, and electronic devices.

Materials in Extreme Environments | Richard W. Neu
Richard W. Neu is a professor in the Woodruff School of Mechanical Engineering and the School of Materials Science and Engineering. His research involves the understanding and prediction of the fatigue behavior of materials and closely related topics, typically when the material must resist degradation and failure in harsh environments. He has investigated a broad range of structural materials, including steels, titanium alloys, nickel-base superalloys, metal matrix composites, molybdenum alloys, high entropy alloys, medical device materials, and solder alloys used in electronic packaging. 

Neu served as an initiative lead in 2022 and will continue in this role in 2023. He will continue to engage and build an interdisciplinary research community to address the complex issues associated with new materials in extreme environments. These environments include high temperature, high pressure, corrosive, wear/erosion, cyclic loading, high-rate impacts, and radiation. In harsh environments, materials are continuously evolving and deforming, presenting a roadblock in advancing engineering systems due to the uncertainty in the performance of new materials or new process methods such as additive manufacturing. Managing this risk by predicting the uncertainties, both internal to the material (its structure feature) and external environment, is an important consideration that materials engineering must address.

Organic Photonics and Electronics | Jason Azoulay

Jason Azoulay is an associate professor and Georgia Research Alliance Vasser-Woolley Chair in Optoelectronics in the School of Chemistry and Biochemistry, with a joint appointment in the School of Materials Science and Engineering. He received his Ph.D. in chemistry from the University of California at Santa Barbara and performed postdoctoral studies at Sandia National Laboratories. His research group unites strong synthetic foundations with physics, materials science, and engineering to synthesize and apply next-generation functional materials. Research within his group includes homogeneous catalysis applied to polymer synthesis; electronic, photonic, magnetic, and quantum materials; device fabrication and engineering; chemical sensing in complex aqueous environments for environmental monitoring; and the synthesis, application, and engineering of high-performance polymers across multiple technology platforms.

Emerging semiconductor materials open new pathways and opportunities to address critical national needs with global societal impacts in climate change, manufacturing, energy, healthcare, information science, consumer applications, defense-wide applications, and many others. Azoulay will work across multiple Georgia Tech centers, topical working groups, and institutes to create a unique materials research environment that spans traditionally siloed disciplines and materials classes. These efforts will advance the chemistry, materials science, and application of emerging photonic, optoelectronic, semiconductor, spin-based, and quantum technologies and raise the recognition of the materials innovations at Georgia Tech to the international stage.

Materials for Biomedical Systems | W. Hong Yeo

W. Hong Yeo is an associate professor and Woodruff Faculty Fellow in the Woodruff School of Mechanical Engineering and the director of the IEN Center for Human-Centric Interfaces and Engineering at Georgia Tech. He received a Ph.D. in mechanical engineering and genome sciences from the University of Washington and did a postdoctoral fellowship at the University of Illinois Urbana-Champaign. His research focuses on the areas of nano-microengineering, soft materials, molecular interactions, and biosystems, with an emphasis on nanomembrane bioelectronics and human-machine interfaces.

Yeo led the Materials for Biomedical Systems initiative in 2022 and will continue in this role in 2023, where he will continue to foster collaborations between faculty, researchers, and clinicians to advance research in biomaterials and biomedical systems. In 2022, this initiative successfully hosted the MBS Day by inviting more than 80 people from academia, industry, and national labs to share knowledge, research ideas, and commercialization opportunities. Yeo believes collaborative research environments between materials science and engineering and medicine will result in fundamental breakthroughs in bioinspired materials, human-centered designs, and integrated biomedical systems, which will significantly advance human healthcare. He also hopes to enhance human health via multidisciplinary materials research to tackle the National Academy of Engineering Grand Challenge to engineer better medicines in collaboration with both academic and industry partners.

"Our investment will help train the next generation of talent necessary to fill key openings in the semiconductor industry and grow our economy from the middle out and bottom up," said NSF Director Sethuraman Panchanathan. "By supporting novel, transdisciplinary research, we will enable breakthroughs in semiconductors and microelectronics and address the national need for a reliable, secure supply of innovative semiconductor technologies, systems and professionals."

View the announcement

Point-of-care technologies are medical diagnostic tests performed outside the laboratory in close proximity to where a patient is receiving care. This allows health care providers to make clinical decisions more rapidly, conveniently and efficiently.

AMCE POCT, which is one of six sites in the U.S. selected by NIH as part of the NIH Point-of-Care Technologies Research Network, was originally established in 2018 to foster the development and commercialization of microsystems (microchip-enabled, biosensor-based, microfluidic) diagnostic tests that can be used in places such as the home, community or doctor’s office. The center played a pivotal role during the onset of the COVID-19 pandemic as the national test verification center to rapidly evaluate COVID-19 tests and help make them widely available.

Read the full announcement

Altogether, the agency is investing $3 million in the three projects led by faculty members in the George W. Woodruff School of Mechanical Engineering (ME) and the School of Materials Science and Engineering (MSE). Georgia Tech is a contributing partner on a fourth project led by Notre Dame researchers to explore materials that can be switched from an insulator to a metal with an external trigger.

The new awards are part of NSF’s Designing Materials to Revolutionize and Engineer our Future (DMREF) program, which is intended to discover and create advanced materials twice as fast and at a fraction of the cost of traditional research methods.

Read more about the researchers' plans on the College of Engineering website.

The new IRI, which has yet to be named, will explore the vast scientific, technological, societal, and economic impacts of innovative materials and devices, as well as foster their incorporation into systems that improve the human condition in areas such as information and communication technologies, the built environment, and human well-being and performance.

“The new IRI will not only combine the strengths of IEN and IMat, but will also allow us to further expand faculty representation from across the Institute,” said Julia Kubanek, vice president of Interdisciplinary Research at Georgia Tech. “As we look at the future of research in these areas, expanding inclusivity of researchers from the liberal arts, design, business, and basic sciences will allow us to better meet the education, workforce development, and innovation needs of Georgia, the U.S., and the world.”

The new IRI will strengthen Georgia Tech’s role in national focus areas such as the National Nanotechnology Initiative, the Materials Genome Initiative, and the CHIPS and Science Act, as well as identify and shape future priorities.

Core competencies of the new IRI will include:

• Fundamental science to comprehend and control matter from the nanoscale to the mesoscale.
• The synthesis, processing, and characterization of materials to achieve desired properties.
• The design and fabrication of novel devices and components with enhanced capabilities.
• The integration of materials, devices, and components into larger systems.
• Computing, modeling, simulation, and big data to advance progress at all length scales.
• Integration into all stages of research, from conceptualization to impact assessment, of economic, business, and social factors to ensure sustainable and equitable benefits.

“IEN and IMat have worked closely together for years, and there is overlap in the research areas we cover,” said Eric Vogel, IMat’s executive director. “This is an opportunity for us to build on IEN and IMat’s individual successes and our strong record of collaboration to create something even more exceptional.”

The new IRI will strengthen the state-of-the-art core cleanroom and characterization facilities, providing researchers with the tools and resources necessary for cutting-edge interdisciplinary research. These facilities will continue to serve both Georgia Tech and, through its leadership within the NSF National Nanotechnology Coordinated Infrastructure, the nation. Recognizing the importance of nurturing talent, it will champion education and outreach programs to inspire the next generation and equip the workforce with the skills necessary to collaborate and communicate across multiple disciplines.

“This is an exciting time to look to the future,” said Michael Filler, interim executive director of IEN. “We highly value the dedication and hard work of our staff and research faculty, who have been crucial to the success of IEN and IMat and will be the backbone of this new organization. We look forward to creating something exceptional in the coming months.”

“Pressure injuries directly impact the veteran’s quality of life, because the medical provider will order the veteran to bed rest for weeks and potentially months,” said Kim House, a physician and medical director of the Spinal Cord Injury Clinic at the Atlanta Veterans Administration Healthcare System. “At every clinic visit, I provide education for pressure injury prevention.”

House could one day have a new tool to offer her patients, thanks to researchers in the Georgia Tech College of Engineering, and wheelchair-bound veterans are just the beginning.

Materials engineers are developing new fabric sensors and a customized wheelchair system that assesses and automatically eases pressure at contact points to prevent injuries from developing in the first place.

“We have three key issues happening: First, continuous pressure. Second, moisture, because when you're sitting in the same spot, you tend to sweat and generate moisture. And third is shear. When you try to move somebody, the skin shears. That perfect combination is what causes pressure injuries,” said Sundaresan Jayaraman, professor in the School of Materials Science and Engineering (MSE). “We believe we have a solution to the perfect storm of pressure, moisture and shear, which means the user’s quality of life is going to get better.”

Get the full story on the College of Engineering website.

The Wearable Intelligent Systems and Healthcare (WISH) Center will work to push innovation in wearable sensors and electronics technologies. Focus areas of the center will include electronics, artificial intelligence, biological science, material sciences, manufacturing, system design, and medical engineering.

“We are excited by the promise of bioelectronics improving human health and all the exciting science engineering that is required to make it a reality,” said Michael Filler, interim executive director of IEN.

WISH is directed by W. Hong Yeo, associate professor in Georgia Tech’s George W. Woodruff School of Mechanical Engineering and the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory, and Yuhang Hu, associate professor in the School of Chemical and Biomolecular Engineering at Georgia Tech.

“I founded WISH to bring together Georgia Tech’s expertise in various disciplines and to create opportunities for developing wearable bioelectronics and human-machine technologies leading to better lives and communities,” said Yeo.

Yeo’s research focuses on developing soft sensors, electronics and robotics for health monitoring and disease diagnosis at the intersection of human and machine interaction. Other researchers in the center represent disciplines from across Georgia Tech’s Colleges of Engineering, Computing, Sciences, Design, and Liberal Arts; Emory University; and Children’s Healthcare of Atlanta.

WISH will be one of IEN’s 10 strategic research centers, along with the 3D Systems Packaging Research Center, a graduated NSF Engineering Research Center focusing on advanced packaging using 2.5D and 3D heterogeneous integration technologies, and the Georgia Electronic Design Center, one of the world’s largest university-based semiconductor research centers. WISH is an evolution of the Center for Human-Centric Interfaces and Engineering, which received seed funding from IEN to focus on collaborative research for human-centered design, biofeedback control, and integrated nanosystems to advance human-machine interaction in the scope of healthcare.

IEN supports early-stage research in underfunded research areas that span all disciplines in science and engineering through its seed grant programs, which focus on research in biomedicine, electronics, optoelectronics and photonics, and energy applications.

In this brief Q&A, Correa-Baena discusses his research focus, how it relates to materials research, and the impact of this initiative.

What is your field of expertise and at what point in your life did you first become interested in this area?

I am an expert in materials for energy harvesting and conversion. I first became interested in this topic when I was an undergraduate student and started thinking about the future of energy production. 

What questions or challenges sparked your current materials research?

I was born and raised in a country where fossil fuels dominate the energy production landscape, yet where renewables are readily available. Colombia is a large producer of oil but also boasts a huge potential for solar energy production. This juxtaposition always puzzled me growing up. As a researcher in this field, I want to ensure that all countries around the world have access to solar energy, by helping lower deployment cost. 

Why is your initiative important to the development of Georgia Tech’s Materials research strategy?

There is a growing need to expand our research footprint at Georgia Tech with regard to photovoltaics. This is especially important with the impact of the photovoltaic industry presence in Georgia. My initiative is focusing on galvanizing activities around photovoltaic research at Georgia Tech that can benefit our footprint globally as well as locally with industry partners.

What are the broader global and social benefits of the research you and your team conduct?

The main benefit of the research we do is to the photovoltaic industry, which we hope to engage through cutting-edge research at Georgia Tech.

What are your plans for engaging a wider Georgia Tech faculty pool with IMat research?

I am planning to organize an internal workshop, as well as a session on photovoltaics in the Next Generation of Energy Materials Symposium to be held in March 2024 at Georgia Tech. In addition, as part of my efforts to engage the Georgia Tech community at large, I am working to create a website that will connect the Georgia Tech community working towards advancing photovoltaic capabilities for future manufacturing advancements. 

The paper was co-authored by all undergraduate students, with guidance from ECE associate professor Vincent Mooney. Three students were from ECE: Gabrielle Calderon, Andrew Hamby, and Valeriia Rubanova. Two others were from the School of Computer Science: Olivia Blanchette and Jing Liu.

“This is the first time I have ever seen an undergraduate team take an unknown research problem with no external funding or relationship to ongoing graduate research and turn the idea into a paper which receives an award,” Mooney said.

The paper titled, “Linguistic Encryption for Underwater Communication,” examined how to use a stream cipher to encode short-fixed length sounds for a swarm of robots to communicate with each other deep under water in a cryptographically secure fashion.

The idea was to "translate" simple commands into the constructed Toki Pona language, which are then mapped to dolphin noises. The dynamic nature of the constructed language made translation and decryption very hard without the stream cipher seed, thus creating a very secure communication system.

The technology has uses in search and rescue capacities as well as general underwater topological surveying.

The paper was selected out of over 100 papers published in the conference.

All the research was done by Mooney’s Secure Hardware VIP group with no outside source of funding.

The VIP program gives undergraduate students the chance to conduct ambitious, long-term, large-scale, multidisciplinary research projects under the guidance of faculty members, giving them substantial real-world experience.

“The VIP program allowed me to explore my interdisciplinary academic interests with the depth of a full research project alongside other highly motivated students,” Calderon said. “Even before this award, the experience I gained working on this project made it extremely worthwhile, especially because we had the flexibility to pursue a somewhat unorthodox idea.”

The consortium of historically Black educational institutions and other stakeholders convened to establish the organization’s strategic direction and governance model. The goal is to foster a diverse workforce and drive innovation in the U.S. semiconductor industry. 

Saligram’s paper, “Cryogenic CMOS for High Performance Computing," won third place in the conference’s Ph.D. Forum.

Cryogenic CMOS for high performance computing is a radical idea that proposes the use of ultra-low temperature devices (~77K/-196C) for server and cloud computing applications. It has gained traction due to the soaring energy costs of data center operation.

The research Rakshith presented at the conference focused on the modeling of devices and interconnects, design technology co-optimization, benchmarking and design of memory macro test chips to demonstrate the system level benefits of cryo-CMOS.

The Ph.D. Forum is a poster session hosted by the Association for Computing Machinery Special Interest Group on Design Automation and IEEE Council on Electronic Design Automation for Ph.D. students to present and discuss their dissertation research with people in the electronic design automation community.

It has become one of the premier forums for Ph.D. students in design automation to get feedback on their research and for industry to see academic work in progress. Hundreds of people attended the forums, and participation is competitive with an acceptance rate of around 30 percent.

Rakshith is a member of the Integrated Circuits and Systems Research Lab and advised by ECE Steve W. Chaddick School Chair Arijit Raychowdhury.

He will be joining the faculty of the University of Tennessee, Knoxville at the start of the Fall 2024 semester.

The prestigious award recognizes the best paper published in the TODAES, the ACM's flagship publications in the area of electronic design automation (EDA).

Yu accepted the award at the 61st Design Automation Conference in San Francisco, Calif. in June.

This is the second consecutive year Yu’s team won an award for research printed in a flagship publication in the area of EDA, and the third year in a row research from ECE has received such an honor.

The paper titled, “Hardware-aware quantization/mapping strategies for compute-in-memory accelerators,” analyzed different combinations of settings for emerging non-volatile memory (eNVM) technologies.

This new technology is important for mixed-signal Compute-in-Memory (CIM) accelerators, which are very energy efficient, thus making them crucial for artificial intelligence hardware design, which are notoriously resource intensive platforms.

Ultimately, the research found the right configuration and settings can significantly improve output and efficiency. Yu’s team was able to achieve an increase in processing speed by up to 60 percent, while doubling the energy efficiency and reducing overall hardware size by up to 25 percent.

The findings provide design guidelines to engineers who continue to research eNVM and CIM technology.

Yu co-authored the paper with ECE Ph.D. graduates Shanshi Huang and Hongwu Jiang, who are now both assistant professors in Hong Kong University of Science and Technology.

Yu’s lab won the IEEE’s Donald O. Pederson Best Paper Award in 2023 for their research on an end-to-end benchmark framework to evaluate state-of-the-art CIM accelerators. The award honors the best paper in the IEEE’s Transactions on Computer-Aided Design of Integrated Circuits and Systems, the flagship journal of the IEEE Council on Electronic Design Automation.

In 2022, ECE Professor Sung Kyu Lim and his research team won the Donald O. Pederson Best Paper Award for their paper on a physical design tool named Compact-2D that automatically builds high-density and commercial-quality monolithic three-dimensional integrated circuits.

Yu also recently received a 2023 Intel Outstanding Research Award for his work on a chip that will help quantify uncertainty that is beyond the capabilities of existing binary computing systems, and improve computing robustness.

This prestigious award recognizes top technical papers at the conference. His paper was selected out of the 306 total submissions eligible for this award this year.

His paper, “Beyond Planar: An Additively Manufactured, Origami-Inspired Shape-Changing, and RFIC-Based Phased Array for Near-Limitless Radiation Pattern Reconfigurability in 5G/mm-Wave Applications,” was co-authored by fellow ECE Ph.D. candidates Chenhao Hu and Nathan Wille, and ECE Professor Manos Tentzeris, in collaboration with George Mason University Electrical and Computer Engineering professor Kai Zeng.

Al Jamal and his team successfully demonstrated the first-ever additively manufactured, origami-inspired, shape-changing phased array at mm-wave frequencies, showcasing near-limitless reconfigurability. This work represents a significant leap, opening impactful opportunities for the advancement of massive MIMO and beyond-5G communication.

An origami-inspired, shape-changing phased array combines this traditional antenna function with the ability to electronically control the direction of the signal and mechanically change its shape through folding structures inspired by origami. This makes the antenna highly adaptable.

Al Jamal has been enrolled in the ECE Ph.D. program since 2022, and is a member of the ATHENA Lab, where he is advised by Tentzeris.

He received his bachelor’s degree in electrical and computer engineering from the American University of Beirut with high distinction.

His research interests include the use of additive manufacturing techniques in designing highly integrated, heterogeneous, and conformal/flexible RF systems encompassing RF front-end circuits, antennas, and packaging up to mm-wave frequencies. He is also keen on advocating engineering education to high school and undergraduate students.

Through his research, Al Jamal aspires to design and build communication devices and RF electronics that draw inspiration from origami and art, leading to enhanced functionality and physical flexibility to seamlessly integrate with human-centered devices, thereby enabling more efficient and integrated communication networks for digital awareness.