Committee:

Dr. Riley , Advisor

Dr. Sudhakar Yalamanchili, ECE

Dr. John Copeland, ECE

Dr. Douglas Blough, ECE

Dr. Richard Fujimoto, CS

Abstract: 

Multi-core design for CPU is the recent trend and we believe the trend 
will continue in near future. Researchers and industry architects 
utilize simulation to evaluate their designs and gain a certain level of 
confidence before manufacturing the actual products. Due to the fact 
that modern multi-core systems are complex, traditional sequential 
simulation can hit the bottlenecks in terms of execution time. To handle 
the complexity, Parallel Discrete Event Simulation (PDES) programs are 
employed. PDES program with well-designed partitioning schemes, 
synchronization algorithm and other optimizations can take advantage of 
the parallel hardware and achieve scalability for the simulation of 
multi-core systems. The objective of this dissertation is to design, develop, test and 
evaluate a variety of technologies to improve the performance and 
efficiency of parallel simulation of multi-core systems. The 
technologies include a general guide for partitioning schemes, an 
efficient front-end for timing-directed simulation, and a new 
conservative synchronization algorithm.