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  <title><![CDATA[Anvesha Amaravati Wins Best Paper Award]]></title>
  <body><![CDATA[<p>Anvesha Amaravati won the Best Paper Award in the analog and mixed signal track at the 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC 2015). The conference was held October 5-7 in Daejon, Korea.</p><p>A Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE), Amaravati was honored for his paper entitled “A Time Interleaved DAC Sharing SAR Pipeline ADC for Ultra-Low Power Camera Front Ends." This paper presents a novel ADC architecture that can perform in-situ inner product on analog data with digital coefficients while enabling wide-input. The proposed design in 130nm CMOS process advances energy efficiency of the state-of-the-art designs by an order of magnitude and is particularly suited for low-power camera (and other sensor) front-ends.</p><p>Amaravati’s coauthors on this paper are Manan Chugh, an ECE graduate student, and Arijit Raychowdhury, who holds the ON Semiconductor Junior Professorship and who serves as Amaravati’s Ph.D. advisor.</p>]]></body>
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      <value><![CDATA[ECE Ph.D. student Anvesha Amaravati won the Best Paper Award in the analog and mixed signal track at the 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC 2015).]]></value>
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      <value><![CDATA[<p>ECE Ph.D. student Anvesha Amaravati won the Best Paper Award in the analog and mixed signal track at the 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC 2015).&nbsp;</p>]]></value>
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            <title><![CDATA[Anvesha Amaravati]]></title>
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      <email><![CDATA[jackie.nemeth@ece.gatech.edu]]></email>
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      <value><![CDATA[<p>Jackie Nemeth</p><p>School of Electrical and Computer Engineering</p><p>404-894-2906</p><p><a href="mailto:jackie.nemeth@ece.gatech.edu">jackie.nemeth@ece.gatech.edu</a></p>]]></value>
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