EPS Distinguished Lecturers are selected from among EPS Fellows, award winners, and society leaders. Selected experts are highly regarded members of the technical community and renowned experts in their respective fields. They are invited to deliver lectures and courses at EPS events, including chapters, conferences, workshops, symposia, and IEEE Student Chapter events.

Notably, Tentzeris has previously served as a Distinguished Lecturer for the IEEE Microwave Theory and Technology Society (MTT) and the IEEE Council on Radio Frequency Identification (CRFID), highlighting his exceptional contributions across multiple societies within IEEE (Institute of Electrical and Electronics Engineers).

Since 2016, Tentzeris has held the Ken Byers Professorship in flexible electronics in ECE. He joined the faculty in 1998 and leads the ATHENA Research Group. Tentzeris’ research specializes in 3D Printed RF electronics, antennas and modules, flexible and conformal electronics and phased antenna arrays up to sub-THz, origami and morphing electromagnetics, Highly Integrated/Multilayer Packaging for RF and Wireless Applications using ceramic and organic flexible materials, “green” paper-based RFIDs and sensors, nanostructures for RF, wireless sensors, energy harvesting and wireless power transfer/wireless power grids, reconfigurable intelligent metasurfaces, heterogeneous integration and SOP-integrated (UWB, multiband, conformal) antennas.

As an EPS Distinguished Lecturer, Tentzeris will deliver lectures on Smart Cities, Smart Agriculture, Smart Manufacturing/Industry 4.0, and Digital Twin domains.

Designed to operate between 18 GHz and 50 GHz, the module could help address threat systems operating at millimeter wave frequencies and provide to military applications many of the advantages that millimeter wave technology is bringing to commercial applications such as 5G wireless, internet-of-things devices, and radar-based vehicle collision avoidance systems.

“The goal is to demonstrate small size, weight, power, and cost in a wideband millimeter wave T/R module,” said Paul Jo, a Georgia Tech Research Institute (GTRI) research engineer who is leading the project. “This would be a major module at the front of the AESA system, right behind the radiator element to process signals.”

Known as Millimeter Wave Active Electronically Scanned Array using Silicon-Germanium Transmit/Receive Modules (MAESTRO), the project represents a collaboration of GTRI and SiGe specialists in Georgia Tech’s School of Electrical and Computer Engineering. The use of SiGe helps support the high level of integration necessary for the miniaturization required by the module’s high-frequency operation.

“When it comes to millimeter wave frequencies, the AESA element lattice is less than one centimeter in size, and at 50 GHz, it’s three millimeters, which is very challenging to work with,” Jo noted. “That forces an extreme level of integration and miniaturization for this T/R system, which we are addressing through design and fabrication of the small SiGe monolithic microwave integrated circuit (MMIC) die.”

The researchers recently completed the fabrication and packaging of a core channel T/R module die, and are designing an evaluation board to demonstrate performance of the module. Also completed is the fabrication of a stand-alone radiator board for wideband and high-frequency applications; that evaluation board also is under test.

Wideband AESAs are an enabling technology for current and future military radar and communications systems by providing rapid beam steering, graceful degradation, electronic production, and low probability of intercept. The atmospheric attenuation of radio-frequency (RF) signals at millimeter wave frequencies is much greater than at microwave frequencies. As a result, high-gain directional apertures such as AESAs are required to propagate energy over tactically relevant distances.

Beyond the high level of integration, the system presents technical challenges related to manufacturing, packaging, and thermal management. For packaging MAESTRO, the research team is evaluating a Flip-Chip Ball Grid Array (FCBGA) solution to reduce the signal path from the die to the printed circuit board.

Earlier in the four-year project, the research team designed and fabricated single-channel and four-channel T/R modules and measured the RF performance of a chip-on-board (CoB)-assembled single-channel T/R module. The measured results confirmed that the designed digital control circuitry works for both Tx and Rx modes – attenuation and true-time delay – and that the time delay was consistent across the target bandwidth.

The MAESTRO program is a collaboration between GTRI and the research team of John Cressler, a Regents Professor at the Georgia Tech School of Electrical and Computer Engineering. Cressler’s team specializes in SiGe for heterojunction bipolar devices designed to provide high-frequency performance in mixed-signal circuit and analog circuit ICs.

“Silicon is a standard technology that industry is using to integrate very complicated systems,” Jo noted. “Since we needed to integrate the whole T/R module system into a very small lattice spacing, we decided to use SiGe to integrate all the discrete components.”

During testing of the T/R module, the researchers realized that the receive mode of their system could operate at even lower frequencies – down to 5 GHz – giving it an operating range of 5 GHz to 50 GHz. Efforts are underway to expand the range of the transmit mode to accommodate a similarly wider frequency band.

The MAESTRO project is part of a GTRI initiative to use SiGe semiconductor technology for a variety of RF applications. The SiGe Multifunction IC for Radio Frequency (SMIRF) program is developing a wideband, multichannel, reconfigurable radio frequency transceiver integrated circuit using the SiGe technology. The goal is to enable element-level digital beamforming of an AESA for RF-converged multifunction systems to support concurrent operating modes such as radar, communications, electronic warfare, positioning, and signals intelligence (SIGINT).

MAESTRO has been supported by GTRI’s Independent Research and Development program.

Writer: John Toon (John.Toon@gtri.gatech.edu)

GTRI Communications

Georgia Tech Research Institute

Atlanta, Georgia USA

The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech). Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,800 employees, supporting eight laboratories in over 20 locations around the country and performing more than $700 million of problem-solving research annually for government and industry. GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry.

Corrective solutions to the issue of MAs have, thus far, been either expensive to implement, such as filtering software, or cause discomfort to the wearer, such as tighter strap attachments and stronger, skin irritating adhesives. The team of W. Hong Yeo, Associate Professor in the George W. Woodruff School of Mechanical Engineering & PI of the Yeo Group & Director of Center for HCIE, working with partners at the Korea Advanced Institute of Science and Technology and Emory University have designed a flexibly packaged wireless wearable ECG device using a new class of strain-isolating materials that reduces MAs, induced by movement in the skin/sensor contact area.

The team’s new strain-isolated, wearable soft bioelectronic system (SIS) adheres naturally to the skin using a breathable soft membrane for continuous conformal contact. A pair of nanomembrane mesh electrodes and a thin-film circuit powered by rechargeable lithium-ion batteries are placed on a thin layer of silicone gel to allow a greater range of motion and packaged within a low modulus silicone elastomer. In testing the design against commercially available skin-mounted biosensors, the team’s new device provides real-time wireless data of multiple physiological signals with a significant reduction in MA interference. Additionally, and most importantly, the device trial participants exhibited no device lamination issues, excessive sweating, signal degradation, or increased skin irritation.

Yeo and his team are pleased with their results to-date but have plans to take the research even further. The team seeks an even smaller device footprint by integrating fan-out wafer-level packaging and developing all-printing fabrication methods. Additionally, the team is planning large-scale clinical studies in cardiology and pediatrics to monitor the health status of both inpatient and outpatient groups on a continuous basis.

- Christa M. Ernst

Rodeheaver, N., Herbert, R., Kim, Y.-S., Mahmood, M., Kim, H., Jeong, J.-W., Yeo, W.-H., Strain-Isolating Materials and Interfacial Physics for Soft Wearable Bioelectronics and Wireless, Motion Artifact-Controlled Health Monitoring. Adv. Funct. Mater. 2021, 2104070. https://doi.org/10.1002/adfm.202104070
 

The low-noise, solution-processed, flexible organic devices offer the ability to use arbitrarily shaped, large-area photodiodes to replace complex arrays that would be required with conventional silicon photodiodes, which can be expensive to scale up for large-area applications. The organic devices provide performance comparable to that of rigid silicon photodiodes in the visible light spectrum — except in response time.

“What we have achieved is the first demonstration that these devices, produced from solution at low temperatures, can detect as little as a few hundred thousand photons of visible light every second, similar to the magnitude of light reaching our eye from a single star in a dark sky,” said Canek Fuentes-Hernandez, principal research scientist in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. “The ability to coat these materials onto large-area substrates with arbitrary shapes means that flexible organic photodiodes now offer some clear advantages over state-of-the-art silicon photodiodes in applications requiring response times in the range of tens of microseconds.”

The development and performance of large-area, low-noise organic photodiodes are described in the Nov. 6 issue of the journal Science. The research was supported by multiple organizations, including the Office of Naval Research, the Air Force Office of Scientific Research, and the U.S. Department of Energy’s National Nuclear Security Administration.

Organic electronic devices are based on materials fabricated from carbon-based molecules or polymers instead of conventional inorganic semiconductors such as silicon. The devices can be made using simple solution and inkjet printing techniques instead of the expensive and complex processes involved in the manufacturing of conventional electronics. The technology is now widely used in displays, solar cells, and other devices.

The organic photodiodes use polyethylenimine, an amine-containing polymer surface modifier found to produce air-stable, low work-function electrodes in photovoltaic devices developed in the laboratory of Bernard Kippelen, Joseph M. Pettit Professor at Georgia Tech. The use of polyethylenimine was also shown to produce photovoltaic devices with low levels of dark current — the electrical current that flows through a device even in the dark. This meant the materials could be useful in photodetectors for capturing faint signals of visible light. 

“Over the years, the dark current levels were reduced so much that measurement equipment had to be redesigned to detect an electronic noise corresponding to a fluctuation of one electron in one millionth of a second,” Fuentes-Hernandez, the paper’s first author, said. “This work reflects sustained team efforts made in the Kippelen group over more than six years and encompasses part of the Ph.D. work of recent graduates Talha Kahn and Wen-Fang Chou. These collective efforts produced the scientific insights needed to demonstrate organic photodiodes with this level of performance.” 

One application for the new devices is in pulse oximeters now placed on fingers to measure heart rate and blood oxygen levels. Organic photodiodes may allow multiple devices to be placed on the body and operate with 10 times less light than conventional devices. This could enable wearable health monitors to produce improved physiological information and continuous monitoring without frequent battery changes. Other potential applications include human-computer interfaces such as touchless gesture recognition and controls.  

A future application is detection of ionizing radiation by scintillation — a flash of light emitted by a phosphor when struck by a high energy particle. Lowering the level of light that can be detected would improve the sensitivity of the device, allowing it to detect lower levels of radiation. Detecting radiation emitted from vehicles or cargo containers requires a large detector area, which would be easier to make from organic photodiodes than from arrays of silicon photodiodes.

Organic photodiodes could have similar advantages in X-ray equipment, where doctors want to use the smallest level of radiation possible to minimize the dose delivered to the patient. Here again, sensitivity, large area, and flexible form factor should give organic photodiodes an advantage over silicon-based arrays. 

“We are working on improving the response time of the photodetector because producing fast photodetectors would enable many additional important applications,” Fuentes-Hernandez said. “There’s a real need to develop photodetector technologies that are more scalable, and one of the motivations of this work is to advance organic technology that we know is cost effective for scaling.”

The organic photodiodes can show electronic noise current values in the tens of femtoampere range and noise equivalent power values of a couple of hundreds of femtowatt. Key performance factors of the organic photodiodes compare well with silicon except in the area of response time, where researchers are working on a hundred-fold improvement to enable future applications. 

“Because we use materials that are processed from inks using printing techniques, they are not as ordered as crystalline materials,” Kippelen said. “As a result, the carrier mobility and the velocity of the carriers that can move through these materials are lower, so you can’t get the same fast signals you get with silicon. But for many applications you don’t need picosecond or nanosecond response time.”

For Kippelen, the photodiode work shows the results of a 25-year effort to improve the performance of organic electronic materials. That work, part of Georgia Tech’s Center for Organic Photonics and Electronics, has involved extensive device modeling to understand the basic science, and research to continuously boost performance of the materials.

“Organic thin films absorb light more efficiently than silicon, so the overall thickness you need to absorb that light is very small,” Kippelen said. “Even if you scale their area up, the overall volume of your detector remains small with organics. If you increase the area of a silicon detector, you have a larger volume of materials that at room temperature will generate a lot of electronic noise.”

The photodiodes made in Kippelen’s lab use an active layer just 500 nanometers thick. A gram of the material, roughly the size of a fingertip, could coat the surface of an office desk.

Kippelen hopes the Science paper will help open new doors for organic semiconductors.

“Advances like this will allow us to change the conventional wisdom that switching to organic materials that can lead to scalable devices would mean giving up performance,” he said. “We can’t anticipate all the new applications that could be enabled by this advance.”

In addition to those already mentioned, the research team included Larissa Diniz, Julia Lukens, Felipe A. Larrain, and Victor A. Rodriguez-Toro, all associated with Kippelen’s lab.

This research was supported by the Department of the Navy, Office of Naval Research Awards N00014-15 14-1-0580 and N00014-16-1-2520; through the MURI Center for Advanced Organic Photovoltaics (CAOP); by the Air Force Office of Scientific Research through Award No. FA9550-16-1-0168, the Department of Energy / National Nuclear Security Administration (NNSA) awards DE-NA0002576 through the Consortium for Nonproliferation Enabling Capabilities (CNEC), and award DE-NA0003921 through the Consortium for Enabling Technologies and Innovation. Support also came from the Chilean National Commission for Scientific and Technological Research through the Doctoral Fellowship program ‘‘Becas Chile,’’ Grant 72150387; from the Colombian Administrative Department of Science, Technology, and Innovation through the program Fulbright-Colciencias; from the National Science Foundation through the Research Experiences for Undergraduates program; and from the Brazil Scientific Mobility Program through an Academic Training Opportunities grant.

CITATION: Canek Fuentes-Hernandez, et al., “Large-area low-noise flexible organic photodiodes for detecting faint visible light.” (Science 2020).

Research News
Georgia Institute of Technology
177 North Avenue
Atlanta, Georgia  30332-0181  USA

Media Relations Contact: John Toon (404-894-6986) (jtoon@gatech.edu)

Writer: John Toon

Media Relations Contact: Christa Ernst (christa.ernst@research.gatech.edu)

That goal received support April 10 with an announcement by Google and Apple that they are collaborating on standards and tools to make it easier for software developers to build apps that can help fight the pandemic. 

For the past month, a team of researchers at the Georgia Tech Research Institute (GTRI) has been working with a community-driven open source project on a “privacy first” open-source app that can take advantage of these tools to do something known as “contact tracing.” Contact tracing software, running on smartphones of persons who’ve chosen to participate, records the kind of person-to-person interactions that have the potential for transmitting contagious illnesses. If any of the other participants the user has interacted with becomes ill and chooses to share information about their symptoms, the software then alerts the impacted user anonymously. During this process, all shared information remains completely anonymous – to other users, to the government, to technology companies, and even to the database that makes the exposure matching possible. 

Individuals notified of a potential exposure could then receive information and guidance about steps they might take, including suggestions to get tested for COVID-19, to self-quarantine, or to closely monitor for symptoms. The notification would be one part of a larger effort to control virus clusters before they become outbreaks. To be most successful, a software-based contact tracing system will have to be coupled with broad-based testing able to quickly determine who’s infected with the virus.

Similar approaches have proven effective in countries such as Singapore and South Korea, though these systems have weaker privacy guarantees in place. A key feature of this new approach is that it would not exchange or publish any personally identifiable information and does not disclose any information at all unless someone voluntarily chooses to share their symptoms or diagnosis. This approach accomplishes this using Bluetooth signal strength to assess proximity rather than GPS data, which is difficult to anonymize and could be used to identify individual users based on frequently visited locations.

“We really need a better early warning network to guard against the re-emergence of COVID-19 in the general population,” said J. True Merrill, a GTRI senior research scientist who is working on the project. “In the early part of this outbreak, COVID-19 was spreading easily across the United States without an early warning of it. After the current shelter-in-place period is over, we are going to need tools to help people determine when they need to self-quarantine in order to stop outbreaks before they can grow.”

Manual contact tracing to identify who’s been infected has long been part of public health strategies to contain serious communicable diseases, but the speed at which COVID-19 has spread outpaced traditional methods, said Alexa Harter, director of GTRI’s Cybersecurity, Information Protection, and Hardware Evaluation Research Laboratory.

Privacy First, for the Common Good

“Smartphone contact tracing is a way of using technology to automate and augment some of the techniques that public health agencies have used,” she said. “Technology can enable us to do this, but for people in the United States to adopt it, privacy will really have to be locked down. Everything we’re doing in this project aims at providing privacy first. Manual contact tracing is still critically important, but digital contact tracing and alerting can significantly assist these efforts.” 

Beyond protecting privacy, large-scale adoption of smartphone contact tracing will need a social component that appeals to supporting the common good.

“To be successful, we’ll need to turn participation in this into a socially good thing, perhaps like the Ice Bucket Challenge,” Merrill said. “We’ll need people to voluntarily opt-in, and to get that, users would need to have full knowledge and control over where their data is stored and with whom they choose to share it.”

An Open-Source Global Effort

GTRI researchers are working with an open source community-driven project known as CoEpi (which stands for Community Epidemiology in Action), which envisions an app of the same name that could be installed on phones running Apple’s iOS or Google’s Android systems. CoEpi focuses on anonymous symptom sharing and alerting to stop the spread of transmissible illnesses like COVID-19. 

Other organizations are also working on contact tracing apps, and these organizations have recently joined together to form the TCN Coalition to support privacy-preserving digital contact tracing protocols to flatten the curve and stop the spread of COVID-19 while reopening the economy. TCN, the core component of the effort, stands for “temporary contact number,” which is an anonymous number generated to privately record interactions between mobile devices without allowing the devices themselves (or their users) to be tracked.

The TCN Coalition developed a common, shared protocol so that all of the different apps in the entire digital contact tracing network can cross-communicate, no matter which app is used. The TCN Coalition also developed a "Digital Contact Tracing Bill of Rights" that outlines requirements to minimize data collection, restricts what can be done with the collected data, and establishes security guidelines to protect civil liberties.  

The Path Forward, Group Benefits

“A symptom-sharing app such as CoEpi would allow us to relax stay-at-home orders so that we can increasingly return to work and public spaces, while providing a way for individuals to get early alerts about potential exposures to symptoms,” said Dana Lewis, one of the founders of CoEpi. “CoEpi can provide early detection of exposure risks for individuals, and an early warning system for the communities they interact in to detect and slow the transmission of illness like COVID-19, influenza, and even the common cold.”

Convincing a hundred million U.S. citizens to install a new app on their phones could be a significant challenge, but the CoEpi focus on symptom sharing and alerting could yield benefits to smaller groups even before being widely adopted.

“The good thing about this is that it could help protect small groups without needing the buy-in of the whole population,” said Harter. “An example would be a retirement community that is largely self-contained. If someone there got sick, it would be important to alert everybody that person had interacted with so they could self-quarantine and protect other people in the community.”

Other groups might include organizations performing critical services, such as factories, warehouses, or package delivery companies. “If you had a group where people really needed to work together, you could get early alerts to stop outbreaks from happening,” she said. It could also be used among small clusters of high-risk individuals and their family and friends, or at universities and schools as they emerge from self-isolation.

How Contact Tracing Would Work

The contact tracing component of the system would work something like this.

Each user opting into the service would install an app that would generate personal keys – long strings of letters and numbers unique to that specific smartphone, which are in turn used to generate randomized temporary contact numbers. The phones of users opting in would then communicate those temporary numbers with each other when they were nearby, using low-energy Bluetooth, a short-distance protocol widely used on mobile devices. Signal strength could provide a measure of how close the phones are to assess the risk of virus transmission when those people crossed paths.

“The idea is to log close interactions,” said Michael Brown, a GTRI research scientist who is the Georgia Tech technical lead of the project. “We’ll want to eliminate as many false positives as possible. For example, it’s highly unlikely that person-to-person transmission would occur across a large room.” For each interaction, the system could also record the duration of proximity, another factor in assessing potential risk.

Each phone would periodically generate new anonymous unique keys, and use those to generate new temporary contact numbers each time it crossed paths with another phone running similar apps. It would record those keys in a database that would be kept on the phone for a short period of time determined by the incubation period of the virus. 

If a CoEpi user developed symptoms, they would share their symptoms in their app. In future versions, the CoEpi developers envision that the sick user would be presented with a series of options such as anonymously notifying public health authorities. For now, the symptoms are sent to the CoEpi system, which would add the anonymous key and symptom report from the sick user’s phone. 

Each user’s phone would periodically download the list of keys associated with known symptom reports and check the temporary numbers generated by those keys against those of the phones it had been near. A match between each phone’s database and the numbers generated from the server’s key list would generate a notification of the exposure, and the app would then help the user decide whether the match likely represented a real exposure, and if so, decide what to do: self-quarantine, be tested, and/or notify public health authorities.

“Everyone would be pinged when they get tied to a known case, but only over a time range that really could have created a risk of transmission,” Merrill said. “There would be no identification information exchanged between the phones or the phones and the server.”

Other Potential Epidemiological Uses

Beyond advice on illness and notification of potential contacts, the system could also generate anonymized epidemiological information useful to researchers tracking pandemics. Users of the system would decide if they want to opt into the database and share their anonymized information with public health authorities.

“The CoEpi project will help provide earlier detection and testing of potential cases, and that information would be helpful for our predictive models,” said Pinar Keskinocak, who is William W. George Chair and Professor in Georgia Tech’s H. Milton Stewart School of Industrial and Systems Engineering.

Beyond programming support, GTRI will assist the effort through security analysis and potentially testing in its Atlanta facilities, Brown said. The testing will need to include many different environments and handset types, including multiple variations in operating systems.

The GTRI researchers have been racing to help CoEpi roll out software for beta and on-site testing, which should occur over the next several weeks. “The time line for this is super aggressive,” Harter said. “There is an urgency to this because we know it will be very useful in helping people stop social distancing, return to work and school, and try to get back to a more normal life.”

If you're interested in helping CoEpi as a mobile developer who can help at #WeAreNotWaiting speed (e.g. today or this week), please reach out to CoEpi: https://forms.gle/MLeKz9nerPvX8fwC8 

Similarly, individuals who are interested in becoming early testers of CoEpi can sign up via the same form: https://forms.gle/MLeKz9nerPvX8fwC8. 

Research News
Georgia Institute of Technology
177 North Avenue
Atlanta, Georgia  30332-0181  USA

Media Relations Contact: John Toon (404-894-6986) (jtoon@gatech.edu).

Writer: John Toon

That goal received support April 10 with an announcement by Google and Apple that they are collaborating on standards and tools to make it easier for software developers to build apps that can help fight the pandemic. 

For the past month, a team of researchers at the Georgia Tech Research Institute (GTRI) has been working with a community-driven open source project on a “privacy first” open-source app that can take advantage of these tools to do something known as “contact tracing.” Contact tracing software, running on smartphones of persons who’ve chosen to participate, records the kind of person-to-person interactions that have the potential for transmitting contagious illnesses. If any of the other participants the user has interacted with becomes ill and chooses to share information about their symptoms, the software then alerts the impacted user anonymously. During this process, all shared information remains completely anonymous – to other users, to the government, to technology companies, and even to the database that makes the exposure matching possible. 

Individuals notified of a potential exposure could then receive information and guidance about steps they might take, including suggestions to get tested for COVID-19, to self-quarantine, or to closely monitor for symptoms. The notification would be one part of a larger effort to control virus clusters before they become outbreaks. To be most successful, a software-based contact tracing system will have to be coupled with broad-based testing able to quickly determine who’s infected with the virus.

Similar approaches have proven effective in countries such as Singapore and South Korea, though these systems have weaker privacy guarantees in place. A key feature of this new approach is that it would not exchange or publish any personally identifiable information and does not disclose any information at all unless someone voluntarily chooses to share their symptoms or diagnosis. This approach accomplishes this using Bluetooth signal strength to assess proximity rather than GPS data, which is difficult to anonymize and could be used to identify individual users based on frequently visited locations.

“We really need a better early warning network to guard against the re-emergence of COVID-19 in the general population,” said J. True Merrill, a GTRI senior research scientist who is working on the project. “In the early part of this outbreak, COVID-19 was spreading easily across the United States without an early warning of it. After the current shelter-in-place period is over, we are going to need tools to help people determine when they need to self-quarantine in order to stop outbreaks before they can grow.”

Manual contact tracing to identify who’s been infected has long been part of public health strategies to contain serious communicable diseases, but the speed at which COVID-19 has spread outpaced traditional methods, said Alexa Harter, director of GTRI’s Cybersecurity, Information Protection, and Hardware Evaluation Research Laboratory.

Privacy First, for the Common Good

“Smartphone contact tracing is a way of using technology to automate and augment some of the techniques that public health agencies have used,” she said. “Technology can enable us to do this, but for people in the United States to adopt it, privacy will really have to be locked down. Everything we’re doing in this project aims at providing privacy first. Manual contact tracing is still critically important, but digital contact tracing and alerting can significantly assist these efforts.” 

Beyond protecting privacy, large-scale adoption of smartphone contact tracing will need a social component that appeals to supporting the common good.

“To be successful, we’ll need to turn participation in this into a socially good thing, perhaps like the Ice Bucket Challenge,” Merrill said. “We’ll need people to voluntarily opt-in, and to get that, users would need to have full knowledge and control over where their data is stored and with whom they choose to share it.”

An Open-Source Global Effort

GTRI researchers are working with an open source community-driven project known as CoEpi (which stands for Community Epidemiology in Action), which envisions an app of the same name that could be installed on phones running Apple’s iOS or Google’s Android systems. CoEpi focuses on anonymous symptom sharing and alerting to stop the spread of transmissible illnesses like COVID-19. 

Other organizations are also working on contact tracing apps, and these organizations have recently joined together to form the TCN Coalition to support privacy-preserving digital contact tracing protocols to flatten the curve and stop the spread of COVID-19 while reopening the economy. TCN, the core component of the effort, stands for “temporary contact number,” which is an anonymous number generated to privately record interactions between mobile devices without allowing the devices themselves (or their users) to be tracked.

The TCN Coalition developed a common, shared protocol so that all of the different apps in the entire digital contact tracing network can cross-communicate, no matter which app is used. The TCN Coalition also developed a "Digital Contact Tracing Bill of Rights" that outlines requirements to minimize data collection, restricts what can be done with the collected data, and establishes security guidelines to protect civil liberties.  

The Path Forward, Group Benefits

“A symptom-sharing app such as CoEpi would allow us to relax stay-at-home orders so that we can increasingly return to work and public spaces, while providing a way for individuals to get early alerts about potential exposures to symptoms,” said Dana Lewis, one of the founders of CoEpi. “CoEpi can provide early detection of exposure risks for individuals, and an early warning system for the communities they interact in to detect and slow the transmission of illness like COVID-19, influenza, and even the common cold.”

Convincing a hundred million U.S. citizens to install a new app on their phones could be a significant challenge, but the CoEpi focus on symptom sharing and alerting could yield benefits to smaller groups even before being widely adopted.

“The good thing about this is that it could help protect small groups without needing the buy-in of the whole population,” said Harter. “An example would be a retirement community that is largely self-contained. If someone there got sick, it would be important to alert everybody that person had interacted with so they could self-quarantine and protect other people in the community.”

Other groups might include organizations performing critical services, such as factories, warehouses, or package delivery companies. “If you had a group where people really needed to work together, you could get early alerts to stop outbreaks from happening,” she said. It could also be used among small clusters of high-risk individuals and their family and friends, or at universities and schools as they emerge from self-isolation.

How Contact Tracing Would Work

The contact tracing component of the system would work something like this.

Each user opting into the service would install an app that would generate personal keys – long strings of letters and numbers unique to that specific smartphone, which are in turn used to generate randomized temporary contact numbers. The phones of users opting in would then communicate those temporary numbers with each other when they were nearby, using low-energy Bluetooth, a short-distance protocol widely used on mobile devices. Signal strength could provide a measure of how close the phones are to assess the risk of virus transmission when those people crossed paths.

“The idea is to log close interactions,” said Michael Brown, a GTRI research scientist who is the Georgia Tech technical lead of the project. “We’ll want to eliminate as many false positives as possible. For example, it’s highly unlikely that person-to-person transmission would occur across a large room.” For each interaction, the system could also record the duration of proximity, another factor in assessing potential risk.

Each phone would periodically generate new anonymous unique keys, and use those to generate new temporary contact numbers each time it crossed paths with another phone running similar apps. It would record those keys in a database that would be kept on the phone for a short period of time determined by the incubation period of the virus. 

If a CoEpi user developed symptoms, they would share their symptoms in their app. In future versions, the CoEpi developers envision that the sick user would be presented with a series of options such as anonymously notifying public health authorities. For now, the symptoms are sent to the CoEpi system, which would add the anonymous key and symptom report from the sick user’s phone. 

Each user’s phone would periodically download the list of keys associated with known symptom reports and check the temporary numbers generated by those keys against those of the phones it had been near. A match between each phone’s database and the numbers generated from the server’s key list would generate a notification of the exposure, and the app would then help the user decide whether the match likely represented a real exposure, and if so, decide what to do: self-quarantine, be tested, and/or notify public health authorities.

“Everyone would be pinged when they get tied to a known case, but only over a time range that really could have created a risk of transmission,” Merrill said. “There would be no identification information exchanged between the phones or the phones and the server.”

Other Potential Epidemiological Uses

Beyond advice on illness and notification of potential contacts, the system could also generate anonymized epidemiological information useful to researchers tracking pandemics. Users of the system would decide if they want to opt into the database and share their anonymized information with public health authorities.

“The CoEpi project will help provide earlier detection and testing of potential cases, and that information would be helpful for our predictive models,” said Pinar Keskinocak, who is William W. George Chair and Professor in Georgia Tech’s H. Milton Stewart School of Industrial and Systems Engineering.

Beyond programming support, GTRI will assist the effort through security analysis and potentially testing in its Atlanta facilities, Brown said. The testing will need to include many different environments and handset types, including multiple variations in operating systems.

The GTRI researchers have been racing to help CoEpi roll out software for beta and on-site testing, which should occur over the next several weeks. “The time line for this is super aggressive,” Harter said. “There is an urgency to this because we know it will be very useful in helping people stop social distancing, return to work and school, and try to get back to a more normal life.”

If you're interested in helping CoEpi as a mobile developer who can help at #WeAreNotWaiting speed (e.g. today or this week), please reach out to CoEpi: https://forms.gle/MLeKz9nerPvX8fwC8 

Similarly, individuals who are interested in becoming early testers of CoEpi can sign up via the same form: https://forms.gle/MLeKz9nerPvX8fwC8. 

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Media Relations Contact: John Toon (404-894-6986) (jtoon@gatech.edu).

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The Chair was endowed in 1998 by Glen P. Robinson, Jr., a pioneer in satellite communications and electro-optics technology, and has since been a source of significant applied research, creating a strong program and accomplishments within GTRI.

Ralph’s appointment to the Glen Robinson Chair will complement his newly established joint appointment status within GTRI and ECE. Furthermore, the appointment provides a platform in which he will be able to work with organizational leadership and research faculty to develop and shape a world-class program in integrated photonics and electro-optics. Ralph will also focus on the performance of internal and sponsored research and will continue leading the Georgia Electronic Design Center (GEDC) to enhance the existing collaborative relationship that he has already established with GTRI and its Electro-Optical Systems Laboratory (EOSL).

“The appointment of Dr. Ralph to this position will ensure that we continue to strengthen and maximize the interactions between the researchers in the Colleges and those in GTRI,” said Chaouki T. Abdallah, executive vice president for research at Georgia Tech. “Those critical collaborations are the foundation for a truly impactful research enterprise as Georgia Tech looks to address local, national, and global issues.”

A Fellow of the OSA and an elected member of the Board of Governors of the IEEE Photonics Society, Ralph has been a member of the ECE faculty since 1998, and he has served as the director of GEDC since 2011. Ralph currently leads a research team of 10 graduate students focused on wideband optical systems including machine learning, integrated photonics, microwave photonics, and quantum communications. He has published more than 325 peer-reviewed papers in journals and conference proceedings and holds 15 patents in the fields of optical communication and signal processing. 

Prior to his career at Georgia Tech, Ralph held a postdoctoral position at AT&T Bell Laboratories and was a visiting scientist with the Optical Sciences Laboratory at the IBM T.J. Watson Research Center. He received his B.E.E. degree from Georgia Tech in 1980 and his Ph.D. from Cornell University in 1988.

Professor Greer’s keynote was followed by presentations from three IEN facility users in varied disciplines. Ting Wang, Ph.D. candidate in Civil and Environmental Engineering, presented “Rapid Determination of the Electroporation Threshold for Bacteria Inactivation Using a Lab-on-a-Chip Platform”. Katie Young, a Materials Science and Engineering Ph.D. candidate, spoke on “The Impact of Defect Density, Grain Size, and Cu Orientation on Thermal Oxidation of Graphene-Coated Cu” and Ph.D. candidate in Chemical & Biomolecular Engineering Yamin Zhang discussed “Zinc Anode Design for Rechargeable Aqueous High-Energy Zn-Air Batteries”.

A reception and poster session followed the lectures, with 21 presentations from facility users. 3 Best Presentation Awards were distributed at the conclusion of the reception. The IEN team congratulates the session winners for their excellent presentations. 

Brummer, Amy and Amar T. Mohabir (Advisors: E. Vogel, MSE & M. Filler, ChBE)
Bottom-Up Patterning and Selective Area Atomic Layer Deposition for Nanowire Electronic Devices
Mini Abstract: Combining a selective etching technique (SCALES) with area-selective atomic layer deposition (AS-ALD), we can fabricate high-performance, fully formed electronic devices using semiconductor nanowires. Since only vapor-phase and solution processing methods will be used, the process can be scaled up to a very large production scale, allowing for massive manufacturing of cheap yet high-performance electronics.
Potential Uses: Large area electronics applications ranging from highly functionalized sensors in building walls, large sensor dust networks to deploy on crops, to smart flexible surfaces.
Presenter Bios: Amy Brummer graduated in 2015 with B.S. in Chemical Engineering from Washington University. She is currently pursuing a Ph.D. in Materials Science and Engineering at Georgia Tech in Dr. Vogel and Dr. Filler’s research groups with a focus on electronic materials applications. Amar Mohabir Graduated in 2015 with a B.S. in Chemical Engineering from the University of Florida. He is currently pursuing a PhD in Chemical & Biomolecular Engineering at Georgia Tech in Dr. Filler’s research group. His focus is on development and optimization of the SCALES technique.

Zifei Sun (Advisor: Gleb Yushin, MSE)
Free-Standing Flexible FeF3-C cathodes for sodium-ion batteries
Mini Abstract: Sodium-ion batteries (SIBs) have recently attracted great attention as a potential alternative to lithium-ion batteries due to ubiquity of sodium reserves. Conversion-type iron trifluoride (FeF₃) may become a particularly interesting cathode due to low cost and abundance of Fe and extremely high theoretical capacity of this material (712 mAh g^-1). Unfortunately, prior studies showed rather poor capacity and cycling performance of FeF₃ due to significant volume changes, morphological changes and various side reactions. Here we demonstrate that by the confinement of FeF₃ nanoparticles in flexible carbon nanofibers (CNFs) to mitigate structural changes during cycling and by utilizing sodium difluoro(oxalate) borate (NaDFOB) as a novel electrolyte salt, substantial performance improvements could be attained.
Potential Applications: Time-of-Flight Secondary Ion Mass Spectrometry, Nuclear magnetic resonance spectroscopy, other spectrographic techniques.
Presenter Bio: Zifei Sun graduated from Shandong Normal University in China with a B.S. in chemistry before beginning her Ph.D. work in School of Chemistry and Biochemistry at Georgia Tech. As a member in Prof. Gleb Yushin's lab, Zifei is researching battery materials and design next generation battery system. 

Katherine T. Young (Advisor: E. Vogel, MSE)
The Impact of Defect Density, Grain Size, and Cu Orientation on Thermal Oxidation of  Graphene-Coated Cu
Mini Abstract: Graphene has been shown to be a promising barrier for thermal corrosion due to its low gas and liquid permeability; however, there have been contradictory reports in the literature regarding the mechanisms of oxidation of graphene-coated Cu. This work systematically investigates the effect of chemical vapor deposited graphene grain size, point defect density, and underlying Cu orientation on the thermal oxidation of the underlying Cu in air. For graphene with either small grain size or large point defect density, oxidizers have relatively unhindered access through these defects to corrode the underlying Cu, and the corrosion is relatively independent of Cu orientation. For graphene with low defect density, the rate of Cu oxidation is limited by the quality of the graphene grown on the specific Cu crystal orientation and the orientation with the weakest graphene-metal interaction. Specifically, graphene-coated Cu (110) corrodes much faster than graphene-coated Cu (111), for graphene synthesized using the same conditions. Young, K. T., et al., App. Surf. Sci. 2019.
Potential Applications: 3.2D materials as gas permeation and corrosion barriers.
Presenter Bio: Katie Young graduated from Georgia Tech with a B. S. in Materials Science and Engineering. She is now pursuing her PhD in Materials Science and Engineering at Georgia Tech. Katie is researching 2D materials for permeation applications.

Yamin Zhang (Advisor: Nian Liu ChBE)
Zinc anode design for rechargeable aqueous high-energy Zn-air batteries
Mini Abstract: Metallic zinc as a rechargeable anode material for aqueous batteries has gained tremendous attention with merits of intrinsic safety, low cost, and high theoretical volumetric capacity (5,854 mAh cm-3). Among zinc-based batteries, Zn-air batteries are promising with highest theoretical volumetric energy density (4,931 Wh/L). Rechargeable zinc anode has recently achieved big progress in neutral electrolytes, yet developed slowly in alkaline electrolytes, which are kinetically favorable for air cathodes. Passivation, dissolution, and hydrogen evolution are three main reasons for irreversibility of zinc anodes in alkaline electrolytes. In this work, we report the design of a sub-micron zinc anode sealed with an ion-sieving coating that suppresses hydrogen evolution reaction (HSSN anode). The design is demonstrated with ZnO nanorods coated by TiO2, which overcomes passivation, dissolution, and hydrogen evolution issues simultaneously. It achieves superior reversible deep cycling performance with an electrolyte-to-discharge-capacity ratio as low as 0.14 mL/mAh, discharge capacity as high as 616 mAh/g, and Coulombic efficiency as high as 93.50% at 100% depth of discharge. It can also deeply cycle >520 times (lasting over ~25 days) in a beaker cell with a capacity retention of 621 mAh/g (94.30% Coulombic efficiency). The design principle of this work can potentially be applied to other aqueous and non-aqueous battery electrode materials.
Potential Applications: High-safety Zn-based batteries (eg: Zn-air batteries) for electric vehicles and energy storage.
Presenter Bio: Yamin Zhang is a 4th-year PhD student in Dr. Nian Liu's group in the School of Chemical & Biomolecular Engineering at Georgia Institute of Technology. She received her B.S. in Chemical Engineering and Technology in 2016 at the Tianjin University (TJU), and another B.S. in Finance in 2016 at the Nankai University. She almost won all the top awards in TJU, including National Scholarship, Honor Student Scholarship (TOP10/29350), and Student Science Award (TOP10/29350). She interned in Hefei Guoxuan High-tech Power Energy Co., Ltd in 2017.

If you are interested in presenting your research at the next annual USER Day, please contact Ms. Amy Duke (amy.duke@ien.gatech.edu).

On October 10th, over 100 attendees joined us for the Fall 2019 NanoFANS Forum, this session focused on the topic of flexible and wearable electronics for healthcare applications. Professor Suresh Sitaraman (ME) is the lead of the Flex@Tech research team and kicked off the seminar with Wearable Electronics: State of the Art and Challenges”. Professor  W. Hong Yeo (ME) discussed Wireless, Stretchable Hybrid Electronics for Smart and Connected Physiological Monitoring, with a particular emphasis on pediatric healthcare applications.  Muneeb Zia (Research Engineer; GT) and Bryce Chung (Research Engineer; Emory) teamed up to present their research, 3D Multi-electrode Arrays Fabricated on Flexible Substrate Enabled Single-Unit Recordings of Muscle Activity in a single lecture slot. The day’s series was capped by a presentation from Professor Omer Inan (ECE) Wearable Joint Health Assessment with Acoustic Emission and Bioimpedance Spectroscopy Sensing. After the lectures, guests were invited to tour the IEN fabrications cleanroom and characterization facilities, supported by the NSF and open for use by the academic and industrial research community.

NanoFANS is a twice-yearly event that focuses on the bio-application of new research. If you are interested in learning more about the NanoFANS Forum, please contact Dr. Paul Joseph (paul.joseph@ien.gatech.edu).

By providing a fully portable, wireless brain-machine interface (BMI), the wearable system could offer an improvement over conventional electroencephalography (EEG) for measuring signals from visually evoked potentials in the human brain. The system’s ability to measure EEG signals for BMI has been evaluated with six human subjects, but has not been studied with disabled individuals.

The project, conducted by researchers from the Georgia Institute of Technology, University of Kent and Wichita State University, was reported on September 11 in the journal Nature Machine Intelligence. 

“This work reports fundamental strategies to design an ergonomic, portable EEG system for a broad range of assistive devices, smart home systems and neuro-gaming interfaces,” said Woon-Hong Yeo, an assistant professor in Georgia Tech’s George W. Woodruff School of Mechanical Engineering and Wallace H. Coulter Department of Biomedical Engineering. “The primary innovation is in the development of a fully integrated package of high-resolution EEG monitoring systems and circuits within a miniaturized skin-conformal system.”

BMI is an essential part of rehabilitation technology that allows those with amyotrophic lateral sclerosis (ALS), chronic stroke or other severe motor disabilities to control prosthetic systems. Gathering brain signals known as steady-state virtually evoked potentials (SSVEP) now requires use of an electrode-studded hair cap that uses wet electrodes, adhesives and wires to connect with computer equipment that interprets the signals.

Yeo and his collaborators are taking advantage of a new class of flexible, wireless sensors and electronics that can be easily applied to the skin. The system includes three primary components: highly flexible, hair-mounted electrodes that make direct contact with the scalp through hair; an ultrathin nanomembrane electrode; and soft, flexible circuity with a Bluetooth telemetry unit. The recorded EEG data from the brain is processed in the flexible circuitry, then wirelessly delivered to a tablet computer via Bluetooth from up to 15 meters away.

Beyond the sensing requirements, detecting and analyzing SSVEP signals have been challenging because of the low signal amplitude, which is in the range of tens of micro-volts, similar to electrical noise in the body. Researchers also must deal with variation in human brains. Yet accurately measuring the signals is essential to determining what the user wants the system to do.

To address those challenges, the research team turned to deep learning neural network algorithms running on the flexible circuitry.

“Deep learning methods, commonly used to classify pictures of everyday things such as cats and dogs, are used to analyze the EEG signals,” said Chee Siang (Jim) Ang, senior lecturer in Multimedia/Digital Systems at the University of Kent. “Like pictures of a dog which can have a lot of variations, EEG signals have the same challenge of high variability. Deep learning methods have proven to work well with pictures, and we show that they work very well with EEG signals as well.”

In addition, the researchers used deep learning models to identify which electrodes are the most useful for gathering information to classify EEG signals. “We found that the model is able to identify the relevant locations in the brain for BMI, which is in agreement with human experts,” Ang added. “This reduces the number of sensors we need, cutting cost and improving portability.”

The system uses three elastomeric scalp electrodes held onto the head with a fabric band, ultrathin wireless electronics conformed to the neck, and a skin-like printed electrode placed on the skin below an ear. The dry soft electrodes adhere to the skin and do not use adhesive or gel. Along with ease of use, the system could reduce noise and interference and provide higher data transmission rates compared to existing systems.

The system was evaluated with six human subjects. The deep learning algorithm with real-time data classification could control an electric wheelchair and a small robotic vehicle. The signals could also be used to control a display system without using a keyboard, joystick or other controller, Yeo said.

“Typical EEG systems must cover the majority of the scalp to get signals, but potential users may be sensitive about wearing them,” Yeo added. “This miniaturized, wearable soft device is fully integrated and designed to be comfortable for long-term use.”

Next steps will include improving the electrodes and making the system more useful for motor-impaired individuals.

“Future study would focus on investigation of fully elastomeric, wireless self-adhesive electrodes that can be mounted on the hairy scalp without any support from headgear, along with further miniaturization of the electronics to incorporate more electrodes for use with other studies,” Yeo said. “The EEG system can also be reconfigured to monitor motor-evoked potentials or motor imagination for motor-impaired subjects, which will be further studied as a future work on therapeutic applications.”

Long-term, the system may have potential for other applications where simpler EEG monitoring would be helpful, such as in sleep studies done by Audrey Duarte, an associate professor in Georgia Tech’s School of Psychology.

“This EEG monitoring system has the potential to finally allow scientists to monitor human neural activity in a relatively unobtrusive way as subjects go about their lives,” she said. “For example, Dr. Yeo and I are currently using a similar system to monitor neural activity while people sleep in the comfort of their own homes, rather than the lab with bulky, rigid, uncomfortable equipment, as is customarily done. Measuring sleep-related neural activity with an imperceptible system may allow us to identify new, non-invasive biomarkers of Alzheimer's-related neural pathology predictive of dementia.”

In addition to those already mentioned, the research team included Musa Mahmood, Yun-Soung Kim, Saswat Mishra, and Robert Herbert from Georgia Tech; Deogratias Mzurikwao from the University of Kent; and Yongkuk Lee from Wichita State University.

This research was supported by a grant from the Fundamental Research Program (project PNK5061) of Korea Institute of Materials Science, funding by the Nano-Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT and Future Planning (no. 2016M3A7B4900044), and support from the Institute for Electronics and Nanotechnology, a member of the National Nanotechnology Coordinated Infrastructure, which is supported by the National Science Foundation (grant ECCS-1542174).

CITATION: Musa Mahmood, et al., “Fully portable and wireless universal brain-machine interfaces enabled by flexible scalp electronics and deep learning algorithm.” (Nature Machine Intelligence, 1, 412-422, 2019). https://doi.org/10.1038/s42256-019-0091-7

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Georgia Institute of Technology
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Media Relations Contact: John Toon (404-894-6986) (jtoon@gatech.edu).

Writer: John Toon

Hudgens holds a Ph.D. in ceramic engineering from Iowa State University. He has led research and development programs in national security, cybersecurity, quantum information science, and photonic microsystems. He also led programs in data analytics, synthetic aperture radar, and airborne intelligence, surveillance and reconnaissance (ISR) systems before becoming director of the $265 million-per-year TIC, which has a staff of 550 professionals working in six states and 136 different laboratories. 

A senior technology executive with 23 years of experience in national security research, Hudgens has also held positions at optical networking firm Mahi Networks, defense contractor Raytheon Electronic Systems, and semiconductor company Texas Instruments. In 2013, he won the Department of Energy Secretary’s Honor Award for Achievement for leading the Copperhead counter-IED program.

“Jim Hudgens has extensive experience building and leading federally sponsored programs that are at the center of GTRI’s core research areas,” said Chaouki Abdallah, Georgia Tech’s Executive Vice President for Research. “His experience developing and managing programs at Sandia National Laboratories and major private-sector defense contractors will support GTRI’s continued growth in service to our nation’s defense agencies and other important state and federal sponsors.”

GTRI has more than 2,300 employees conducting nearly $500 million worth of research across a broad range of technology areas that focus on solving critical challenges for government and industry sponsors. GTRI is one of the world’s leading applied research and development organizations, and is an integral part of Georgia Tech’s research program.

“Georgia Tech, through GTRI, is entrusted with a vital role in our national security,” Hudgens said. “I know firsthand that GTRI and other Georgia Tech researchers are known for the exceptional quality of their work in delivering innovative solutions to the most complex national security challenges.

“It is a great privilege for me to join the combined University System of Georgia and Georgia Tech family to develop a shared vision for how we will build on this reputation to advance one of the nation’s leading technological research universities,” he added. “I thank Georgia Tech President G.P. “Bud” Peterson, Provost Rafael Bras, and Executive Vice President Abdallah for the honor of becoming part of GTRI’s 85-year legacy of service to the state of Georgia and our nation.”

In congratulating Hudgens, Peterson emphasized GTRI’s important role in the nation, region, state – and Georgia Tech itself.

“For decades, the U.S. government and industry have looked to Georgia Tech – in particular GTRI – as they seek to find and develop effective, creative solutions in national security and other mission-critical areas,” Peterson said. “We are pleased to welcome Jim Hudgens to lead one of Georgia Tech’s most important missions in support of our nation, region, and state.”

Hudgens’ selection came after a five-month national search during which he was one of four finalists to make presentations to Georgia Tech faculty and staff.

Sandia National Laboratories is a multi-mission laboratory operated for the U.S. Department of Energy’s National Nuclear Security Administration. Sandia has major research and development responsibilities in nuclear deterrence, global security, defense, energy technologies, and economic competitiveness, with main facilities in Albuquerque, New Mexico, and Livermore, California. Sandia is the largest of the country’s 17 national laboratories.

GTRI conducts research through eight laboratories located on Georgia Tech’s midtown Atlanta campus, in a research facility near Dobbins Air Reserve Base in Smyrna, Georgia, and in Huntsville, Alabama. GTRI also has more than a dozen locations around the nation where it serves the needs of its research sponsors. GTRI’s research spans a variety of disciplines, including autonomous systems, cybersecurity, electromagnetics, electronic warfare, modeling and simulation, sensors, systems engineering, test and evaluation, and threat systems.

Media Relations Assistance: John Toon (404-894-6986) (jtoon@gatech.edu).

Writer: John Toon

Research News
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Ravichandran received the award for his paper entitled “Design and Demonstration of 3D Glass Panel Embedded (GPE) Packages for Heterogeneous Integration.” The paper addresses the limitations of current mold-based wafer-level fanout packaging technology by presenting a novel 3D glass-based panel embedded packaging technology to meet the bandwidth, power-efficiency, cost, and reliability requirements of future mobile and high-performance computing applications.

This research was supported by the Industry Consortium at the 3D Systems Packaging Research Center (PRC) at Georgia Tech. Ravichandran, along with his colleagues in the PRC, are developing all of the basic technologies to design and demonstrate 3D GPE packages for a variety of heterogeneous integration applications that include ultra-high bandwidth computing; 5G and millimeter wave communications; MEMS & sensors; IoTs; and flexible, wearable, and low and high-power electronics.

This Class of 1940 distinction is one of several awards made annually by CTL to instructors of small and large classes. The award recognizes faculty members with exceptional response rates and scores on the Course-Instructor Opinion Surveys (CIOS). A high response rate (85 percent or greater) and a near-perfect evaluation score were also required for consideration. 

Cressler is being recognized for his outstanding teaching in IAC 2002 Science, Engineering, and Religion: An Interfaith Dialogue. He holds the Schlumberger Chair Professorship in Electronics in the School of Electrical and Computer Engineering (ECE) and leads the Silicon-Germanium Devices and Circuits Group.

Graber is being honored for his outstanding teaching in ECE 4012 ECE Culminating Design Project II. He is an assistant professor in ECE and leads the Plasma and Dielectrics Laboratory.

Krishna is being recognized for his outstanding teaching in ECE 8823 Interconnection Networks for High-Performance Systems. He is an assistant professor in ECE and leads the Synergy Lab.

Lim is being honored for his outstanding teaching in ECE 2020 Fundamentals of Digital System Design. He holds the Dan Fielder Professorship and leads the Georgia Tech Computer-Aided Design Lab.

Yang is being recognized for his outstanding teaching in ECE 2026 Introduction to Signal Processing. A frequent instructor of ECE courses, Yang is a senior research engineer in the Georgia Tech Research Institute’s Electro-Optical Systems Laboratory.

Georgia Tech faculty associated with STAMI also presented on their current research programs and poster sessions with students and rsearchers provided ample opportunities for exchanges of ideas and networking. CRĀSI also hosted a brainstorming Odyssey of the Mind lunch on the first day with the participation of all industry and Georgia Tech researchers on mixed teams. Industrial speakers from Mitsubishi Chemical and Johnson and Johnson also presented on the science and technology important to their companies and markets.

Over the two days, attendees gained a deeper understanding of critical research currently happening at Georgia Tech as well as a chance to connect to students and researchers Creating the Next solutions in advanced materials and interfaces.

The new structure gives thin-film transistors stability comparable to those made with inorganic materials, allowing them to operate in ambient conditions – even underwater. Organic thin-film transistors can be made inexpensively at low temperature on a variety of flexible substrates using techniques such as inkjet printing, potentially opening new applications that take advantage of simple, additive fabrication processes.

“We have now proven a geometry that yields lifetime performance that for the first time establish that organic circuits can be as stable as devices produced with conventional inorganic technologies,” said Bernard Kippelen, the Joseph M. Pettit professor in Georgia Tech’s School of Electrical and Computer Engineering (ECE) and director of Georgia Tech’s Center for Organic Photonics and Electronics (COPE). “This could be the tipping point for organic thin-film transistors, addressing long-standing concerns about the stability of organic-based printable devices.” 

The research was reported January 12 in the journal Science Advances. The research is the culmination of 15 years of development within COPE and was supported by sponsors including the Office of Naval Research, the Air Force Office of Scientific Research, and the National Nuclear Security Administration.

Transistors comprise three electrodes. The source and drain electrodes pass current to create the “on” state, but only when a voltage is applied to the gate electrode, which is separated from the organic semiconductor material by a thin dielectric layer. A unique aspect of the architecture developed at Georgia Tech is that this dielectric layer uses two components, a fluoropolymer and a metal-oxide layer. 

“When we first developed this architecture, this metal oxide layer was aluminum oxide, which is susceptible to damage from humidity,” said Canek Fuentes-Hernandez, a senior research scientist and coauthor of the paper. “Working in collaboration with Georgia Tech Professor Samuel Graham, we developed complex nanolaminate barriers which could be produced at temperatures below 110 degrees Celsius and that when used as gate dielectric, enabled transistors to sustain being immersed in water near its boiling point.” 

The new Georgia Tech architecture uses alternating layers of aluminum oxide and hafnium oxide – five layers of one, then five layers of the other, repeated 30 times atop the fluoropolymer – to make the dielectric. The oxide layers are produced with atomic layer deposition (ALD). The nanolaminate, which ends up being about 50 nanometers thick, is virtually immune to the effects of humidity.  

“While we knew this architecture yielded good barrier properties, we were blown away by how stably transistors operated with the new architecture,” said Fuentes-Hernandez. “The performance of these transistors remained virtually unchanged even when we operated them for hundreds of hours and at elevated temperatures of 75 degrees Celsius. This was by far the most stable organic-based transistor we had ever fabricated.”

For the laboratory demonstration, the researchers used a glass substrate, but many other flexible materials – including polymers and even paper – could also be used. 

In the lab, the researchers used standard ALD growth techniques to produce the nanolaminate. But newer processes referred to as spatial ALD – utilizing multiple heads with nozzles delivering the precursors – could accelerate production and allow the devices to be scaled up in size. “ALD has now reached a level of maturity at which it has become a scalable industrial process, and we think this will allow a new phase in the development of organic thin-film transistors,” Kippelen said.

An obvious application is for the transistors that control pixels in organic light-emitting displays (OLEDs) used in such devices as the iPhone X and Samsung phones. These pixels are now controlled by transistors fabricated with conventional inorganic semiconductors, but with the additional stability provided by the new nanolaminate, they could perhaps be made with printable organic thin-film transistors instead.

Internet of things (IoT) devices could also benefit from fabrication enabled by the new technology, allowing production with inkjet printers and other low-cost printing and coating processes. The nanolaminate technique could also allow development of inexpensive paper-based devices, such as smart tickets, that would use antennas, displays and memory fabricated on paper through low-cost processes. 

But the most dramatic applications could be in very large flexible displays that could be rolled up when not in use.

“We will get better image quality, larger size and better resolution,” Kippelen said. “As these screens become larger, the rigid form factor of conventional displays will be a limitation. Low processing temperature carbon-based technology will allow the screen to be rolled up, making it easy to carry around and less susceptible to damage. 

For their demonstration, Kippelen’s team – which also includes Xiaojia Jia, Cheng-Yin Wang and Youngrak Park – used a model organic semiconductor. The material has well-known properties, but with carrier mobility values of 1.6 cm2/Vs isn’t the fastest available. As a next step, they researchers would like to test their process on newer organic semiconductors that provide higher charge mobility. They also plan to continue testing the nanolaminate under different bending conditions, across longer time periods, and in other device platforms such as photodetectors.

Though the carbon-based electronics are expanding their device capabilities, traditional materials like silicon have nothing to fear.

“When it comes to high speeds, crystalline materials like silicon or gallium nitride will certainly have a bright and very long future,” said Kippelen. “But for many future printed applications, a combination of the latest organic semiconductor with higher charge mobility and the nanostructured gate dielectric will provide a very powerful device technology.”

This research was supported in part by the Center for Organic Photonics and Electronics at Georgia Tech, by the Department of the Navy, Office of Naval Research Awards N00014-14-1-0580 and N00014-16-1-2520, through the MURI Center for Advanced Photovoltaics (CAOP), by the Air Force Office of Scientific Research through Award No. FA9550-16-1-0168, by the National Nuclear Security Administration Award DE-NA0002576 through the Consortium for Nonproliferation Enabling Technologies (CNEC). Seminal work on the concept of using a bilayer gate dielectric in OFETs was funded in part by Solvay S.A. and described in part in issued patent No. US 9,368,737 B2.

CITATION: Xiaojia Jia, Canek Fuentes-Hernandez, Cheng-Yin Wang, Youngrak Park, Bernard Kippelen, “Stable organic thin-film transistors,” (Science Advances, 2018). 

Research News
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Writer: John Toon

Su is a May 2018 Ph.D. graduate of the Georgia Tech School of Electrical and Computer Engineering (ECE) and now works at Google as a hardware engineer. She joined the ATHENA Lab in fall 2013, where she was advised by Manos Tentzeris, who holds the Ken Byers Professorship in Flexible Electronics. She received her bachelor’s degree in Electrical Engineering from Beijing Institute of Technology in summer 2013 and her master's in ECE at Georgia Tech in May 2015.

Su's Ph.D. research focuses on interface advanced novel fabrication techniques such as inkjet-printing and 3D printing, and special mechanical structures such as microfluidics and origami. She also works on high-performance microwave components/antennas to solve existing problems and extend to applications in smart health, wearable electronics in Internet-of-Things (IoT) applications. Su specifically focuses on designing novel reconfigurable antennas/microwave passives components using dielectric liquid, as well as liquid metal alloy, and building liquid sensors/sensing platforms for easier communication and better sensing.

A potential strategy to overcome this barrier is to introduce new materials into the transistor structure to enhance their performance and functionalities. And that is the playground of Professor Asif Khan’s group of the School of Electrical and Computer Engineering at the Georgia Institute of Technology. “One of the interesting classes of functional materials that we are working on is called antiferroelectric oxides, which could lead to efficient, nanoscale logic and memory devices and devices which can even mimic the functions of biological neurons and synapses,” says Khan. In their recent work published as an Editor’s Pick in the May issue of Applied Physics Letters, they show how these mystery materials—antiferroelectrics—can be fine-tuned by doping, and how their processing techniques can be simplified to ease their entry into conventional micro- and nano-electronic fabrication technologies.

Antiferroelectric materials are electrical insulating in a way very similar to the dielectric materials used in regular capacitors. However, the significant difference is that when a certain voltage is applied across it, it undergoes a phase transition into another  insulating state which is structurally different than the parent one. With appropriate nano-scale engineering, this phenomenon can be the basis for high performance logic transistors and disruptive memory technologies. Interestingly, antiferroelectricity was discovered more than 60 years ago in perovskite materials—yet it did not have a significant impact on the electronics industry despite the attractiveness because perovskites are not compatible with currently used CMOS fabrication processes. What makes the Khan group’s work particularly relevant for transistor applications is that they are studying this phenomenon in Zirconia--a very well-studied non-perovskite binary oxide which has already been in use for more than a decade in the semiconductor industry.

The major contribution of the recent work by Khan’s group is that they significantly simplified the complex process flow of stabilizing the antiferroelectric phase of zirconia. Typically, a metallic capping layer and a high temperature annealing step is required to convert dielectric zirconia into an antiferroelectric state. The group were able to eliminate these process steps through a thoughtful design process of the material stack. Khan is hopeful that this will reduce the barrier to entry of antiferroelectrics into the state-of-the-art semiconductor manufacturing processes for novel device applications. Furthermore, by introducing small amounts of lanthanum into zirconia, the researchers were able to tune the properties of antiferroelectric zirconia, namely critical field/voltage for phase transition, dielectric constant and polarization. “Such tunability can not only enable a large design space for nanoelectronic antiferroelectric devices, but also be useful for their traditional applications of antiferroelectrics in electro-calories, pyroelectrics and micro-actuators,” says Khan. He also mentions that antiferroelectricity is a close cousin of a well-known phenomenon—ferroelectricity, which being researched and adopted by major semiconductor manufacturers for potential memory applications. His previous work also focused on ferroelectric oxides for ultra-low power negative capacitance transistors. However, as he points out, antiferroelectric oxides can do all that ferroelectric oxides can but with much better endurance and reliability and reduced process complexity.

Khan’s group actively collaborated with their industry partner, Eugenus, Inc. located in San Jose, CA. “Our industry-academia partnership is vital for bringing new ideas into the fore-fronts of technology,” says Dr. Mukherjee of Eugenus, Inc., also a co-author of the paper.  “We look forward to further collaboration to assess the applicability and the potential of new material and device concepts.” The Khan group also collaborated with the Charles University at Prague, Czech Republic, on structural characterization of the antiferroelectric zirconia films.

- Christa M. Ernst

“Antiferroelectricity in lanthanum doped zirconia without metallic capping layers and post-deposition/-metallization anneals” is an Editor’s Pick in May’s Applied Physics Letters. You can view the article here. https://aip.scitation.org/doi/10.1063/1.5037185

Khan’s work at Georgia Tech is supported in part by the National Science Foundation.

Over the course of five years, this grant program has seeded forty-five projects with forty-nine students working in ten different schools in COE and COS, as well as the Georgia Tech Research Institute and 2 external projects.

The 4 winning projects, from a diverse group of engineering disciplines, were awarded a six-month block of IEN cleanroom and lab access time. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in materials, biomedicine, energy production, and microelectronics packaging applications.

The Spring 2018 IEN Seed Grant Award winners are:

• Jiang Chen (PI Ben Wang - MSE): Validation and Characterization of Living Cell Grafting on Polycaprolactone Fibers for Textile Tissue Engineering
• Fatima Chrit (PI Alexander Alexeev - ME): Microfluidic Adhesion-based Sorting of Biological Cells
• Zifei Sun (PI Gleb Yushin - MSE): FeOx Coated FeF3-C Nanofibers as Free-standing Cathodes for Sodium- Ion Batteries
• Ting Wang (PI Xing Xie - Civil and Environmental Engineering): Development of Lab-on-a-Chip Devices for the Mechanisms Study of Cell Transportation and Bacteria Inactivation in a Non-Uniform Electric Field

Awardees will present the results of their research efforts at the annual IEN User Day in 2019.

Glass packaging is emerging as an ideal next-generation  packaging substrate in 2.5D and 3D package architectures in high-performance computing and 5G communications because of its many advantages including ultra-high electrical resistivity, low loss, high thermal and dimensional stabilities and large-area panel manufacturing for low cost. Two package architectures are being concurrently pursued: substrate-based and embedding-based, both in large panels. However, glass has a relatively low thermal conductivity (~1 W/m∙K) compared to silicon (~150 W/m∙K), which may aggravate thermal challenges in some applications.

The Georgia Tech-led team is comprehensively addressing the above challenges with advances in all aspects of thermal management at chip and system levels, as shown in Figure 1, with: a) copper through-via structures and two-phase heat-spreaders, b) Near-zero and low-resistance thermal interfaces and c) external cooling with miniaturized single and two-phase cold plates.  

The first step in solving the thermal challenge of glass substrates is to increase their thermal conductivity overall and at selective spots through inclusions of metalized copper structures.

• Copper through-package vias and two-phase heat-spreaders: Georgia Tech proposes and demonstrates  a novel  substrate cooling approach to overcome the limitations associated with low thermal conductivity of glass by incorporating copper structures such as through-package-vias (TPVs) and copper slugs, and copper traces in redistribution layers (RDL) into glass substrates and integrating ultra-thin (< 1 mm) two-phase heat spreaders (vapor chambers) which can spread heat more efficiently than copper into the mother board as shown in Fig. 2a. Through extensive modeling, fabrication and characterization, the thermal performance of glass interposers has been demonstrated  closer to that of silicon as more of the above copper structures are introduced into the interposers. In addition, both interposers show almost identical performance after integration with vapor chambers as shown in Fig. 2b. The vapor chambers, which improve heat spreading by ~ 25% compared to thin copper RDL layers, offer significant thermal performance enhancements to glass interposers when coupled with thermal paths made of copper structures.

(a) schematic of glass interposer package with copper structures and vapor chamber integrated in PCB;

(b) junction-to-board thermal resistance in 4 different study cases; and

(c)  thermal resistance of PCB integrated with vapor chamber (total thickness: ~ 1 mm) vs. copper plated PCB (total thickness: ~ 1 mm)

• Thermal Interface Materials (TIMs): The Georgia Tech team has also developed next-generation Thermal Interface Materials (TIMs) for both embedded and substrate-based packages, aiming at reducing the thermal contact resistances to provide maximum heat transfer from the chip. In embedded packages, the approach used involves direct-plated copper on chip, resulting in near-zero thermal interface resistance. In chip-last substrate-based packages, an innovative sintering approach to form thin interfaces is proposed and developed to realize all-Cu die-attach joints with minimum contact resistance, and highest thermal and electrical conductivities, to meet the emerging needs of analog and power systems.
• Zero-resistance TIM: Thermal dissipation requirements of 30-100W power amplifiers was addressed by integrating large copper heat spreaders directly and conformally onto the Si ICs, as shown in Fig. 3. By reducing the number of interfaces between the heat source and heat sink, heat transfer has been maximized. This innovative process was developed to achieve panel-scale direct metallization as well.

• Low-resistance TIM: Nanocopper sintered films were demonstrated with standard semi-additive processes of electroplating and chemical etching. The fabrication process is very versatile and can be used to form patterned-foam films on the die or substrate or as standalone foam films to be used as die-attach inserts. This technology, therefore, provides an innovative, manufacturable and cost-effective way to fabricate all-Cu, large-area die-attach joints to enable higher current densities and operating temperatures in emerging digital and analog applications, as well as provide a low-cost alternative to Ag- sintering in power electronics systems. Film sintering at 200°C directly to Cu metallization was demonstrated, forming strong and reliable joints with bulk-like Cu properties, as shown in Fig. 4.

• Miniaturized liquid-cooling: The Georgia Tech team also addresses the miniaturization challenges in system-level cooling with a new class of integrated cold plates. The use of customized, additively- manufactured metal foams, as shown in Fig. 5, is developed to improve thermal performance by using the advanced metal foams (high specific surface area, thermal conductivity, and specific volume) to improve temperature uniformity, to manage hot spots, and to create additional nucleation sites for liquid boiling and enable, for the first time, reliable two-phase cooling. Additive manufacturing provides design flexibility in realizing customized foam inserts, providing a comprehensive solution for miniaturization of system-level liquid cooling.

(a)  thermal resistance of PCB integrated with vapor chamber (total thickness: ~ 1 mm) vs. copper plated PCB (total thickness: ~ 1 mm).

(b)  composite metal foams.

About the Authors

Dr. Sangbeom Cho was a PhD student in PRC, and advised by Prof. Yogendra Joshi and Prof.Tummala. His research focus is on thermal modeling, design and characterization. He is currently with Qualcomm and can be reached at scho84@gatech.edu

Nithin Nedumthakady is a PhD student in Prof. Rao Tummala’s group, and being mentored by Dr. Venky Sundaram and Dr. Vanessa Smet. His research focus is on thermal management in embedded modules, nnedumthakady3@gatech.edu.

Kashyap Mohan is a PhD student in Prof. Rao Tummala’s group, and being mentored by Dr. Vanessa Smet. His research focus is on nano-copper die-attach materials, kmohan9@gatech.edu.

Justin Broughton is a PhD student in PRC, and advised by Prof. Yogendra Joshi and Prof Tummala. His research focus is on thermal modeling, design and characterization, justin.d.broughton@gatech.edu

Dr. Venky Sundaram is a Research Professor in Prof. Tummala’s group, and the Deputy Director of the Center, vs24@mail.gatech.edu.

Dr. Vanessa Smet is a Research Professor in Prof. Tummala’s group, and the Program Manager for high-power packaging, thermal management and interconnections and assembly areas, vanessa.smet@prc.gatech.edu.

Prof. Yogendra Joshi is an Endowed Chair Professor in the ME Department, Georgia Tech. yogendra.joshi@me.gatech.edu.

Prof. Rao Tummala is the Joseph M. Pettit Chair Professor in ECE and MSE, and the Director of Georgia Tech’s 3D Systems Packaging Research Center (GT PRC), rao.tummala@ece.gatech.edu.

Researchers at the Georgia Tech Research Institute (GTRI) are supporting the mission of AF DCGS in a broad range of ways. GTRI is providing expertise from subject matter experts in an array of sensing areas in which GTRI researchers have extensive experience supporting the development and prototyping of new services needed by the Air Force, conducting training and technology transfer activities for DCGS personnel, and providing advice on the information technology that underlies the DCGS to the programmers who maintain and enhance the system.

By modeling the flow of information through the DCGS, GTRI is helping the Air Force continuously improve the system, boosting efficiency and enhancing its ability to bring together the massive data sets that quickly provide critical information.

“For the Air Force analysts sitting at these workstations around the clock, we want to make sure they get the information they need as quickly, accurately, and efficiently as possible,” said Molly Gary, a GTRI principal research scientist who has led the project for nearly five years. “We want to help the Air Force improve the fusion of data so the analysts can more quickly get an understanding of what it all means and provide actionable intelligence to the commanders.”

The DCGS is the primary intelligence, surveillance, and reconnaissance (ISR) platform for the U.S. Air Force. As part of its operation, more than a thousand analysts sift through a broad range of information, including real-time video, geospatial intelligence, intelligence collected by humans in the field, electronic signals, and other sources to create regular reports on what is happening in global trouble spots.

The Air Force system provides globally-integrated ISR capabilities and feeds into subsystems operated by the Army, Navy, Marine Corps, and other agencies that provide information at the unit level. 

The system is complex, dating back to the 1960s and involving more than two dozen facilities around the world. DCGS has been built by a number of different vendors, contributing to a “stovepipe” system in which analysts on one part of the system do not necessarily have visibility into what analysts in other parts of the system are doing. Other challenges include disparate hardware and software systems, duplicated applications, differing operating systems, redundant software solutions, network security requirements, and a variety of information technology (IT) procedures.

To address these challenges, the Air Force is adopting an open architecture strategy in which systems are more standardized and the connections between specialized areas are more transparent – with a goal of making the system modular, more efficient and less expensive to operate. As an independent not-for-profit university-based organization, GTRI is helping map out the full system and how it is connected to the flow of data from one part to another – and ultimately provides information useful to warfighters.

“By going to an open architecture system, the goal is to break down the barriers between different stovepipes to realize more efficiencies,” said Louis Tirino, a GTRI senior research engineer who’s also supporting the project. “We can help leverage a lot of existing and new technologies that are available to break down those barriers to bringing data together. Ultimately, this will help reduce costs for the Air Force and ease the management burden.”

Regents Researcher Bill Melvin and Principal Research Engineer Alan Nussbaum teamed together and initiated the partnership with AF DCGS. The program is also supported by GEOINT Specialist and Senior Research Engineer Kyle L. Davis, and SIGINT Specialist and Senior Research Associate Clayton Besse. Several of GTRI’s eight laboratories are involved in different portions of the program.

Over the past six years, GTRI has been engaged in multiple DCGS tasks. Among them was Project Liberty, which developed and deployed a Forward Processing, Exploitation, and Dissemination (FPED) system to analyze real-time, full-motion video, signals intelligence, and other information to provide critical information to field commanders. The system was delivered just eight months after it was proposed.

GTRI’s support to DCGS builds on earlier work done to improve the capabilities of the Nation’s Multi-Disciplinary Intelligence (Multi-INT) system, which monitors incoming data. GTRI's work in that effort, known as the Multi-INT (MINT) Data Fusion System, helped automate and rapidly transform functions within the intelligence process to maximize the efficiency and effectiveness of analysts working on this task.

MINT also addressed issues of improving network bandwidth and information processing power to help human analysts stay on top of incoming data by focusing on the most significant information. It used the STINGER Graph tool, developed by GTRI, to assist in identifying relations between data.

For the GTRI researchers, the DCGS work is rewarding because it supports the people who risk their lives in the field.

“Ultimately, the entire weapons system is to help the analyst and warfighter do their jobs,” said Tirino. “By breaking down these barriers across the different lanes of incoming information, we can help make the information more readily accessible to the analyst. All of this is here to support the warfighters.”

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The four researchers are part of the Georgia Tech Research Institute’s (GTRI) Severe Storms Research Center (SSRC), and for them, a day without clouds is a day without new information on how deadly tornadoes and severe thunderstorms develop and move across the Peach State.

Tornadoes in the Southeast United States can differ dramatically from those popularized by storm chasers in the Midwest. In the Southeast, severe tornadoes may not stay on the ground for long, often dropping out of clouds and disappearing with only a relatively short, but deadly and destructive ground track. They also often occur at night, may be wrapped in rain, and embedded in larger squall line structures.

These characteristics mean that tornadoes in the Southeast can be difficult to forecast using conventional weather radar, especially for storms near the edges of a radar’s coverage area. But the measurement of lightning can be done more easily and can be useful because an increase in lightning activity can indicate an intensifying storm that could spawn a tornado. So to supplement existing National Weather Service warning technologies, the SSRC has been focusing on measuring lightning in north Georgia, in collaboration with the local National Weather Service office in Peachtree City.

“When lightning occurs in the clouds or from the clouds to the ground, it produces bursts of radio-frequency energy,” explained Trostel, the center’s director. “Our sensors pick up those bursts of energy and by looking at the times when each sensor receives the signal, we can calculate a 3-D path to the source. That allows us to map the lightning in near real-time.”

To capture the lightning data, the SSRC has built the North Georgia Lightning Mapping Array, a network of 12 sensors located around the metropolitan Atlanta area, extending as far south as Newnan and McDonough, and as far north as Acworth and Duluth. The array feeds into a monitoring system that consolidates and transmits the information to the Short-term Prediction Research and Transition Center (SPoRT) and ultimately to the National Weather Service office in Peachtree City.

“We want to know which storms are active enough to produce lightning because that gives us information about the dynamics of what’s going on inside the clouds,” Trostel said. “Total lightning, which includes both cloud-to-cloud and cloud-to-ground activity, often jumps before severe weather begins, so this can provide a more advanced warning. By collecting information from our array, we expect to be able to determine which storms are likely to become severe.”

Each lightning measurement sensor, based on a design developed by engineers at the New Mexico Institute of Mining and Technology, includes an antenna, a small Linux computer, two 12-volt batteries, and a transmitter – all in a weather-proof box. The earliest systems relied on power and network connections from the organizations hosting the sensors, but SSRC personnel have now converted most of the sensors to use solar power and wireless transmitters that can operate independently of a host building.

The GTRI team builds and maintains the equipment, relying on assistance from other entities such as Emory University, the Georgia Department of Natural Resources and local public safety organizations to provide locations.

“It’s a really big scientific collaboration and research partnership,” said Perry, who is a GTRI electrical engineer at the SSRC.

The 12 locations transmit data every minute to provide real-time forecasting information and also store more detailed information useful to the researchers. The real-time data goes first to GTRI, then to Huntsville, Alabama, where it is processed and sent to Dallas, Texas, for inclusion in data feeds that can be used by National Weather Service forecasters. The data is also posted in real time at the website (nglma.gtri.gatech.edu).

“If a storm is developing, forecasters might not see the next radar image for as much as six minutes, so the more frequent updates we provide can help forecasters issue an earlier warning,” said Frank, who is a GTRI research meteorologist.

A tornado can form and drop from the clouds within the time required for a single sweep of weather radar, noted Losego, who is also a GTRI research meteorologist. The North Georgia Lightning Mapping Array can help forecasters focus attention on which storms should be watched more closely. 

“We don’t issue forecasts, but the information from the array can help forecasters determine which storms to watch based on their lightning activity,” Losego explained. “Forecasters may not know exactly which storm may produce a tornado, so having lightning data can help inform their decision-making.”

Beyond lightning, the center is also studying infrasonics, very low frequency sound waves produced by severe storms. The signals, which are below the range of human hearing, can travel long distances and may one day provide an additional source of early warning data.

The SSRC was created after a tornado touched down in Gainesville, Georgia, March 20, 1998. The early morning storm killed 12 people in Georgia and caused extensive damage. The storm dropped out of the clouds quickly, preventing forecasters from issuing a timely warning. 

The SSRC launch was supported by the state of Georgia, Georgia Emergency Management Agency (GEMA) and the Federal Emergency Management Agency (FEMA).

In addition to its interest in severe weather, the SSRC also supports other weather-related projects at GTRI. It has supplied meteorological forecasting to a military program focused on air-dropping supplies, and to designers of inflatable antenna dishes where information about atmospheric pressure is critical.

 “We have been able to see how wind events, temperature drops, and rain rates affect the antennas,” explained Frank. “For the designers, we are assessing the correlation between weather conditions and performance.”

And the center is part of GTRI’s outreach to K-12 schools. Researchers produce weather programs for schools and use high school students in their field work. High schools were also involved in an earlier project to build “electric field mills” to detect changes in electromagnetic energy caused by charged clouds and lightning.

“High schools students are quite capable and showed us they were able to build complex instruments that really worked,” said Trostel. “Our K-12 outreach helps get students excited about science, technology, engineering, and mathematics. We think that will pay off in the long term.”

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Embedded Wafer-Fan-Out (WFO), as an outgrowth of wafer level packaging with fan-out I/Os, has been a great success. It provided a path for wafer foundries to get into packaging with the most advanced wafer-based materials and tools. It has been applied for analog and digital applications. One of the most recent applications is the Integrated Fanout (InFO) packaging by TSMC for Apple processor and memory to achieve unparalleled bandwidth in a consumer product. This has caused a disruptive change from substrate-based flip-chip packaging, the most dominant packaging technology until then. The primary benefits of this technology are many and include not requiring assembly, and not requiring a substrate with wiring. But its manufacturing processes require reconstitution of diced ICs to be embedded in either molded epoxy or laminates, both limiting the ultimate potential of this technology.

Limitations of WFO 

Wafer fanout, however, is limited in achieving its full potential in future generations. Future packages are multi-chip heterogeneous packages with some passive components to form SiPs. Such packages will be large in size. If these embedded packages are applied for high-performance digital applications, requiring logic and HBM chips, they may be even larger. In addition, they need to have ultra-high I/O density between logic and memory with ultra-short interconnect length, and, in addition, require high power and high heat flux dissipation. Current WFO technologies are limited in 7 ways: (1) large die shifts during molding and curing, (2) high warpage, (3) rough surface of molded wafers for precision RDL fabrication, (4)  large CTE mismatch between WFO package and the board, affecting reliability, especially for large package sizes, (5) high dimensional instability of molded WFO package for fine lines and vias, requiring  large capture pads, (6) coarse through mold or through encapsulant via pitch, and (7) low thermal dissipation due to embedding of ICs into low thermal-conductivity mold compound or laminate substrates.

Georgia Tech’s Inorganic Glass Panel Embedding (GPE) Approach not limited by molding compounds:

Georgia Tech proposes and is developing Ultra-thin Glass Panel Embedding (GPE), as shown in Figure 1, as a pioneering, inorganic approach to embedding with unlimited potential, in performance, thickness, hermeticity, reliability and cost. The GPE approach overcomes all the above 7 limitations as described below. Georgia Tech is developing this technology with its 40 supply-chain industry partners who are supplying the latest and most advanced materials and large area tools. The technology is being developed for a wide array of applications that include: 1) ultra-high bandwidth computing, 2) 5G and millimeter wave communications, 3) sensors for autonomous driving, 4) IoTs, 5) flexible and wearables, 6) low power for computing and high-power for electric cars requiring high-temperature electronics. In GPE, chips are embedded face-up in glass cavities by means of ultra-thin adhesive bonding, followed by dielectric lamination and gap filling, followed by advanced RDL processes that Georgia Tech has been developing to 1 micron line and via.

GPE Building Block Technologies Address the Above 7 Challenges:

GPE building blocks are being developed to address the 7 challenges of WFO as described below.

(1) Die shift is dramatically reduced from greater than 25um for WLFO to less than 5um for GPE, by eliminating dimensionally-unstable molding compounds and replacing them with glass that is perfectly CTE-matched to ICs. High-precision cavities are formed at ultra-high throughput in 50-100um thin glass panels by etching, laser ablation or mechanical machining, as shown in Figure 2. The die placement processes into glass cavities were optimized and less than 1-2 um die drifts have been consistently achieved on 150mm panels. This led to the first ever demonstration of the ability to land laser vias on 40um pitch HBM I/O pads on a test chip provided by Global Foundries, as shown in Figure 3.

(2) Warpage: Up to 2-4x reduction in warpage has been demonstrated with GPE, compared to WFO, due to its ability to match the CTE of glass to large ICs, and by eliminating the cure shrinkage of mold encapsulation. Warpage of less than 200um on a 300mm wafer-equivalent area has been shown in GPE panels, compared to >1mm in WFO. This warpage reduction is critical to achieve high-density RDL by lithographic processes.

(3) Surface Roughness: Glass is drawn into sheets, resulting in ultra-smooth surfaces with 1-2nm average roughness. Mold compounds, on the other hand, have a very rough surface after curing due to high filler particle loading, and require expensive grind and polish steps to achieve a smooth surface. 

(4) Chip- and Board-Level Reliability: The CTE of glass can be tailored anywhere from 3ppm/C to 11ppm/C, all ready for ultra-thin large panel or roll-to-roll processing to meet chip-level and board-level reliability requirements for large package sizes. WFO is limited to small and medium size packages since mold compounds cannot achieve ultra-low CTE to minimize warpage and die shifts. Low and high CTE glass packages, as large as 20-30mm, and SMT attached to PWBs, have passed 1000s of thermal cycles and more than 20 drops, in previous testing by GT and its partners.

GPE is ultra-thin, using glass layers only 50-70 um thick. The GT team first demonstrated a fully-integrated GPE package with less than 215um total thickness in 2016 as shown in Figure 5. The combination of ultra-low die shifts, ultra-smooth surface and low warpage, and ultra-fine pitch RDL formation on glass led to the first ever demonstration of a 40um I/O pitch 2.5D GPE package, as shown in Figure 6. This breakthrough technology will be presented at IEEE ECTC conference in June 2018 in San Diego, CA.

GPE Applications

Georgia Tech is applying Glass Panel Embedding to a variety of heterogeneous package integration (HPI) applications, including logic-memory integration for high-performance computing, 5G and mm-wave for high-bandwidth wireless, IVRs for power modules, RADAR modules for autonomous driving, and many more.

Digital – Smartphone and HPC:

3D GPE is being applied to logic-memory integration for smartphone applications, with much higher bandwidth and I/O density than WLFO due to the smaller and finer pitch TPVs in glass. In high performance computing, silicon interposers are the primary approach today for logic-memory bandwidth. Although current Silicon interposers are capable of scaling to sub-micron wiring densities, they are ultimately bump limited, due to the limits of solder scaling. They also require additional BGA packages to connect to boards to ensure reliability. GPE is being applied to multi-chip 2.5D interposers to scale not only the RDL, but also the chip-to-package bump interconnects to Back-End-Of-Line (BEOL) I/O pitches, since the GPE chip to package interconnects are all-Cu plated using RDL processes. GPE packages with embedded IVRs are expected to improve bandwidth per unit of power by a factor of 5x or more compared to silicon interposers.  Large body size GPE packages can also be directly assembled onto boards and the tailorable CTE of glass enables excellent board-level reliability.

RF, Analog and Power:

Organic substrates are prone to process variations and this becomes critical in 5G and mm-Wave applications. Glass, on the other hand, offers excellent dimensional stability reducing the process variations even at panel-scale, increasing yield and lowering cost. The high resistivity of glass combined with shorter interconnects in GPE packages provide unparalleled high-frequency performance. Glass also has ~2-3x lower loss-tangent as compared to mold compounds and laminates, making GPE an ideal candidate for high-frequency applications. Both wireless front-end modules and power modules require a large number of passives and GPE provides an ideal platform for embedding both active and passive devices into the substrate. For high-power RF modules, such as those using GaN or GaAs chips for 5G infrastructure and other applications, large copper slugs are being integrated into GPE to improve thermal dissipation far beyond current WLFO packages.

Autonomous Driving Sensors:

Glass and GPE are a perfect choice for mm-wave RADAR modules. Transmission losses on glass, enabled by the ultra-smooth surface and precision RDL formation processes, can be as low as the losses obtained using much more expensive and difficult-to-process Teflon substrates. The embedding of Si and non-Si (SiGe) RADAR ICs leads to highest interconnect performance in the package. Antenna integration in package, rather than on boards, leads to smallest form factor systems with better detection range at much lower cost than current RADAR modules.

GT PRC is currently working in collaboration with global partners including material and tool suppliers, on improving the yield at panel-scale by controlling the die shift and large area warpage to drive the GPE technology towards commercialization in various applications.

About the Authors

Siddharth Ravichandran is a PhD student in Prof. Rao Tummala’s group, and being mentored by Dr. Sundaram. His research focus is on GPE and its application to “smartphone in a package”, siddharth.ravichandran@gatech.edu.

Tailong Shi is a PhD student in Prof. Rao Tummala’s group, and being mentored by Dr. Sundaram. His research focus is on design, fabrication and characterization of next-generation automotive RADAR module by GPE, tshi@gatech.edu

Shuhei Yamada is with Murata Japan, and a visiting engineer at Georgia Tech PRC, focusing on GPE technology development, syamada3@gatech.edu

Dr. Venky Sundaram is a Research Professor in Prof. Tummala’s group, and the Deputy Director of the Center, vs24@mail.gatech.edu.

Prof. Rao Tummala is the Joseph M. Pettit Chair Professor in ECE and MSE, and the Director of Georgia Tech’s 3D Systems Packaging Research Center (GT PRC), rao.tummala@ece.gatech.edu.

“Fundamentals of Electronic Device and Systems Packaging Technologies”

Prof Rao Tummala

This introductory and undergrad textbook defines the new and emerging vision for packaging as interconnecting, powering, cooling and protecting, not only devices, but all system components to form systems like smartphones. It also sets the stage for both homogeneous and heterogeneous package integration at device level, initially, and entire system-on-package in about a decade. Currently, all devices are packaged individually or in multiples in 2D, 2.5D and 3D architectures by two different approaches, chip-last and chip-first. They are also produced from wafer fabs and from package fabs. They are then assembled onto system boards. This leads to interconnecting all devices and other components through the board, making the interconnection lengths at system levels about 20-100X more than the interconnection length between the IC and package. 

This book divides packaging into 3 eras - Packaging in the Moore’s Law era,  with focus on SOC; Packaging in the post Moore’s Law era, with focus on 2.5D and 3D MCMs, also called More than Moore; and ultimately packaging the entire system-on-package (SOP), referred to as System Moore. In this scenario, only two frontier technologies are necessary to form any system—Transistor scaling by Moore’s Law and System Scaling by System Moore or second law of electronics, yet to be developed.

This book introduces the concept of packaging to consist of 10 or so core packaging technologies to form any electronic system.  This includes electrical design, mechanical design, thermal design and technologies, materials and processes for electronic, photonic, wireless to 5G and millimeter wave, substrate wiring and I/Os, interconnections and assembly, passive components, sealing and encapsulation. This book is organized in exactly the same way, with all these technologies. In addition, the book builds advanced packaging architectures in 2D, 2.5D and 3D using these basic technologies. It goes one step further to describe the latest and emerging packaging technologies at system level.

Finally, the last chapter describes how all these basic technologies are applied for a variety of next-generation applications that include: computing, communications, bio-medical, automotive, consumer such as smartphone, IoT, flexible and wearable electronics.

The book is being authored and edited by Prof. Rao  Tummala with contributions from many of the world’s leading experts including Prof. Tummala’s colleagues at Georgia Tech and elsewhere, and his students at Georgia Tech. Karen May, Prof. Tummala’s Assistant, has been acting as the overall coordinator for creating the manuscript.

The book is expected to be available by the end of 2018 from McGraw-Hill.

5G modules scale bandwidth in two distinct domains by embedded or non-embedded 3D packaging: (1) in sub-6GHz bands with massive MIMO, requiring 5x or more component density than with 4G LTE, and (2) in mm-wave bands starting at 28GHz and 39GHz. The package challenges are many and include a new and unparalleled set of low-loss dielectric materials and ultra-precision processes. Unlike with 4G, antenna arrays need to be integrated in the 3D package with smaller sizes and ultra-low transmission losses, below 0.1 dB/mm, enabled by ultra-small, 2% process variations to meet stringent in-band loss and out-of-band rejection specifications. Heterogeneous integration in 3D ultra-thin packages is needed to achieve better component densities and performance than with the existing 2D organic laminate packages. The industry has pursued thick multilayer organic (MLO) packages with chips on one side and antenna arrays on the other side with through-vias such as by IBM, ASE and others who demonstrated such an antenna-in-package (AiP) phased-array system with transceiver dies flip-chip-attached to the backside of the package substrate. Organic packages, however, are limited by poor line-width control due to dimensional instability, requiring more layers with low process precision and high via transition losses, resulting in thicker packages. Fan-out wafer-level packaging is being developed for 5G modules to address these challenges with precision and low losses, antennas and through-via transition losses but at a high cost.

Georgia Tech proposes and develops ultra-thin laminated and large-panel 3D-glass packaging in two different architectures: with and without embedding, from sub-6GHz to mm-wave modules. Georgia Tech approach is a hybrid approach involving ultra-thin and ultra-low loss polymers and large ultra-thin glass, together achieving an unparalleled set of properties not possible with other packaging technologies, making Georgia Tech approach unique and superior. Glass, as a thin but high modulus core provides exceptional dimensional stability, with minimum warpage that is required to achieve the 2% process precision across the panel. Also, the glass panel is ultra-thin (<100 microns) and with an ultra-smooth surface finish, unlike laminate cores. Its TCE (thermal coefficient of expansion) can be matched perfectly to Si but can also be optimized for both chip- and board-level reliabilities simultaneously. The performance superiority, however, comes from ultra-low loss dielectrics on the glass surfaces and around copper through-vias. Such a hybrid approach achieves ultra-low loss of PTFE–like materials (polytetrafluoroethylene) while improving RDL circuit precision by up to 10X compared to multilayer organics. Through-package vias (TPVs) in glass can be scaled to 30-50 microns pitch and, even smaller in thinner glass substrates, compared to 300mm or larger pitch in organic laminates and molded embedded packages. The Georgia Tech approach is also superior in reducing the size of the modules as it enables double-side integration and assembly of active and thin-film passive components with the lowest loss, thus reducing the X-Y footprint of the modules by about half, and reducing the interconnect length between them to less than 100 microns. By scaling to 510 mm panel size manufacturing, the Georgia Tech 5G packaging can lower the cost compared to wafer-level packages. One example of laminated 5G glass package is illustrated in Fig. 1.  Such a 3D structure has the following attributes:

1. Lower via transition losses with smaller geometries
2. Lower losses from chip to an antenna, enabled by shorter vertical and lateral interconnections
3. Package-integrated antennas
4. Thin-film low-pass and band-pass filters
5. 3D package architecture with actives and passives on both sides, thus reducing the overall size.

These are briefly described below:

1.   Low via transition losses with smaller geometries: Smaller vias that are enabled by thin glass show better performance such as lower insertion and return losses because of the impedance of the smaller vias matching perfectly with the transmission lines. Due to the better impedance match to the waveguides, their Voltage Wave Standing Ratio (VSWR) is nearly equal to one. This greatly reduces the signal bounce back to the source and hence a lower delay and greater bandwidth. Nearly the same via and capture pad sizes, which is only possible with the Georgia Tech’s laminated glass approach, results in significantly improved signal transmission performance by offering lower parasitic and reduced resonances at 5G frequencies. In addition, through-vias in a laminated glass does not show nonlinear effects, which greatly helps in suppressing the high-frequency noise harmonics. Georgia Tech has demonstrated small via formation, low-loss and ultra-short interconnections with 0.038 dB/microvia and 0.079 dB/through-substrate via at 5G frequencies.  22% bandwidth with 4.2 dBi gain with Yagi-Uda antennas on glass

2. Low interconnection losses: Ultra-thin buildup films with ultra-low dielectric loss enable ultra-low-loss signal transitions between components. As compared to thick transmission lines in laminates, thin transmission line structures in laminated glass substrates with insertion losses of 0.05 dB/mm have been demonstrated, as illustrated in Fig. 2. The superiority of laminated glass to form precision circuitry is also expected to further lower the losses. Interconnect losses in this hybrid glass approach, combined with the loss tangent of >0.005 of polymer dielectric, is shown to be superior to those with just low-loss LCP or other Teflon-like materials, with loss tangents <0.002. This is because of the other benefits of glass such as precision circuitry, smoothness of conductors and exceptional impedance match.

3. Package-integrated antennas with high gain: Laminated glass, in combination with low-loss polymer films, enables new opportunities for superior bandwidth and high antenna gain, and miniaturization of antenna arrays. Georgia Tech has recently demonstrated Yagi-Uda antennas and Horn antennas to achieve high gain and high bandwidth with excellent coverage. Single elements for both structures are designed to have >4 dBi with 20% bandwidth in 28 and 39 GHz bands. Such superior performance of Yagi-Uda antenna designs with thin laminated glass is shown in Fig.3.

4. Thin-film low-pass and band-pass filters: The Georgia Tech’s approach enables high-quality distributed passive components such as filters and couplers with high-precision. The advanced RDL developed in the 5G project further enables ultra-miniaturized 5G packages in 3D. Using some of the most advanced RDL design rules, 5G distributed band-pass filters are designed with the size of about one-quarter wavelength in free space (λ₀) corresponding to the cut-off or center frequency. The Georgia Tech laminated-glass approach enables low insertion loss in passband (~2 dB) along with >30 dB rejection in stopband, as illustrated with bandpass filters in Fig. 4, enabling new opportunities for broadband package designs.

5. 3D package for 5G with actives such as transceiver ICs, controllers, amplifiers and switches in ultra-thin 3D glass packages is being developed using two approaches: a) Chip-last with a double-sided assembly of actives, b) Chip-first with glass-panel embedding (GPE). Small-pitch through-vias in ultra-thin substrates, and large-area and high-throughput substrate processing tools and processes such as laser vias and double-side metallization techniques allow interconnecting the components on both sides with advanced panel processes to achieve lower cost. Large copper structures in 3D glass have also ben been demonstrated to eliminate the hotspots and reliability issues with embedded high-power dies. GT and its partners have recently demonstrated such 5G glass panels, as shown in Fig. 5.  The precision impedance matching was shown to significantly lower the insertion loss.

The 5G project is in collaboration with several industry partners, including glass companies such as Corning Glass, Asahi Glass, and Schott Glass for supplying the ultra-thin glass panels; low-loss dielectric material suppliers such as Ajinomoto, Rogers, JSR, Panasonic; tool companies such as Ushio for precision lithography and Disco for planarization, ESI for high-precision microvia and through-via formation, Atotech for supplying the chemistry for advanced metallization processes; module companies such as Murata and Samtec, and end-users such as Qualcomm and Samsung.

About the Authors

Atom Watanabe is a Ph.D. student in Prof. Rao Tummala’s group, being mentored by Drs. Raj and Sundaram. His research focus is on EMI shielding and mm-wave module integration. atom@gatech.edu.

Muhammad Ali is a Ph.D. student in Prof. Rao Tummala group, being mentored by Drs. Raj and Sundaram. His research focus is on design, fabrication, and characterization of 5G and mm-wave passive components. ali_cmi@gatech.edu.

Prof. Manos Tentzeris is a Ken Byers Professor in the ECE Department, Georgia Tech. etentze@ece.gatech.edu.

Dr. Raj Pulugurtha is a Research Professor in Prof. Tummala’s group. pm86@mail.gatech.edu.

Dr. Venky Sundaram is a Research Professor in Prof. Tummala’s group and a Deputy Director of the Center. vs24@mail.gatech.edu.

Prof. Rao Tummala is the Joseph M. Pettit Chair Professor in ECE and MSE, and the Director of Georgia Tech’s 3D Systems Packaging Research Center (GT PRC). rao.tummala@ece.gatech.edu.

A small electrical charge is generated when a piezoelectric material is compressed, flexed, or vibrated. Harnessing this technology at the visitor complex, the researchers are using a thin, ceramic disk of lead zirconate titanate, which has the strongest piezoelectric response of any known material. “Just as a sponge squeezes out water,” said Stern, “the piezo element under pressure squeezes out electricity that can be harvested and stored.” 

For this unique project, the researchers designed floor cavities of very thin, ultra-high- performance concrete. To fit into each cavity, the Georgia Tech engineers designed a novel system of custom electronics: circuit boards, six mini solar panels, a battery, LEDs, a Bluetooth transmitter, a Wi-Fi transmitter, micro controllers, and the piezoelectric element—all of which are covered by a loadbearing glass tile top. 

The tiles operate on three power sources: piezoelectricity, solar panels, and a small rechargeable lithium battery for energy storage and use at night. The self-powered system, when triggered by a human footstep, produces a wireless signal that informs visitors about NASA space missions, piezoelectric technology as well as the STEM cooperation between NASA and Georgia Tech. 

“No one has made anything like this—an outdoor tile system using a piezoelectric element to trigger customized and off-the-shelf electronics and coupling them for human interactions,” said Stern. “When you step on the load-bearing glass tile, it compresses the piezoelectric element, creating an electrical charge that lights up the cavity’s 125 LEDs.” In the entire footpath, about one thousand glass tiles light up in various colors. Each glass tile is a pixel in the pathway’s mosaic imagery of Earth, Mars, the moon, and the International Space Station.

“The piezoelectric element also powers a Wi-Fi or Bluetooth signal to visitors’ smartphones, which can play audio, providing information about their geolocation and for potential wayfinding,” said Stern. “The audio provides information such as how much energy is being generated throughout the park during the day.” 

Although a small amount of energy is produced per piezo element, per step, the aggregation of such systems in heavily trafficked areas can produce a significant amount of electricity to be stored for local onsite powering of street signs, lights, and other facilities. “The piezo element has a very long lifetime, but these are modular systems that could be easily updated over time,” he said. The glass lid can be removed so the piezo element and electronics system can be updated with newer technologies.” 

Many of the site’s engineering applications are based on fundamental research by the lab of Alper Erturk, an associate professor in Georgia Tech’s George W. Woodruff School of Mechanical Engineering. Erturk, Stern, and their graduate students, for instance, have utilized a method of vibrating a piezo element’s edge, called plucking, allowing for the coupling of the piezoelectric material’s inherently high resonant frequency, to the low frequency of human scale motion. This has various applications intended for biomechanical energy harvesting. 

In future smart cities applications, lattices of pressure-sensitive sensors underneath roadways could produce wireless, real-time signals distributing information about roadway conditions, temperature, or traffic. Roadway sensors and autonomous vehicles could share information, and vehicles could communicate with each other through the roadway’s wireless system. Indoor flooring systems powered by piezoelectricity could provide safety monitoring and sensing capabilities without being plugged into to the grid. 

“We need a more flexible use of the electric grid,” Stern said. “Our goal is to develop more self-powered, self-generating systems with added storage that will give us more choices in energy usage and minimize waste. As much as possible, we should convert wasted mechanical energy—human and vehicle movement—into usable energy generation and storage.”  

Research News
Georgia Institute of Technology
177 North Avenue
Atlanta, Georgia  30332-0181  USA

Media Relations Assistance: John Toon (404-894-6986) (jtoon@gatech.edu).

Writer: John Tibbetts

With billions of connected devices, and several more billions to come in the next few years, the opportunities are endless.  With such a dramatic growth, the devices need to be low-cost, preferably self-powered, low power-consuming, wirelessly connectible, reliable, mass producible, customizable, easily accessible and usable, lightweight, and also be able to conform to the surface of the object to which they are attached.  This conformality then drives the need for flexible electronics, changing the world of electronics from one of being flat and stiff to one which is bendable and stretchable. This paradigm shift in electronics, driven by the shape of things-to come drives the need for Flexible Hybrid Electronics (FHE).

With these grand challenges in mind, Prof. Suresh Sitaraman from the George W. Woodruff School of Mechanical Engineering and the Institute for Electronics and Nanotechnology (IEN) , Georgia Tech hosted, in conjunction with NextFlex, the Flexible Hybrid Electronics Manufacturing Innovation Institute, a workshop that focused on expert presentations of state-of-the-art, along with the  defining a technical roadmap targeting on the power aspects of FHE device, called “Powering the Internet of Everything”.

The workshop, attended by nearly 90 Government, Industry, and Academic experts was held in the Marcus Nanotechnology Building on November 6 – 8, 2017. The three-day event included invited talks, roadmapping, a student technical poster session, and guided tours of principal research and shared user laboratories where FHE related research, micro/nano fabrication and microanalysis occur on the GT campus. Labs visited included mechanical and electrical testing, modeling and characterization; additive and 3D printing; device packaging; soft robotics and exoskeleton; organic photonics and electronics; and the IEN micro/nano fabrication and microscopy laboratories, to name a few. Workshop attendees were able to get up a close up view to the interesting FHE projects in which students and faculty are engaged. At each stop in the tour students demonstrated their work and answered questions about their programs, from flexible batteries for IOT to robotic human augmentation exoskeletons, FHE-enabled wearables and human-machine interfaces, and more.  Of greatest interest to the participants were those technologies that had already been demonstrated in the GT labs and which are ready for prototyping and pilot scale manufacturing.

Technical sessions included; Power and Energy Systems Needs, Energy Harvesting Strategies, Energy Storage Strategies, Power Management Strategies, and Ultra-Low Power Electronics/Sensors. Speakers were drawn from both government and private sectors, as well as academia. Speakers included participation from AT&T, IBM, NIH, Naval Surface Warfare Center, the Office of Naval Research, PARC, Silniva, Air Force Research Lab, Oak Ridge National Laboratory, Blue Spark Technologies, Analog Devices, Texas Instruments, and the Georgia Institute of Technology.

Following the technical sessions, the Marcus Nanotechnology Building Atrium space filled to capacity for an evening reception and competitive student poster and demo session. With over 35 FHE projects on display, the judging team consisting of industry and government experts was challenged with determining the best posters based on the content, clarity and organization, and overall presentation. After the scores were tallied, it was announced that there was a three-way tie for first place, a second place winner, and a tie for third, with all of them winning monetary awards.

Below is a list of the winning poster titles and authors:

Tied for 1^st

“Toward all-soft and fully-integrated microsystems: vertically integrated physical and chemical microsystems using gallium-based liquid metal and soft lithography”, Min-gu Kim and Prof. Oliver Brand

“Novel Architectures for Polymer Thermoelectric Devices for Energy Harvesting”, Akanksha Menon, Kiarash Gordiz, and Prof. Shannon Yee

“Soft, Fluidic Modulation of Skin Temperature”, Donald J. Ward, Nil Z. Gurel, Prof. Omer T. Inan, and Frank L. Hammond

2^nd Place

“Self-powered Wide-frequency Flexible Triboelectric (SWIFT) Microphone”, N. Arora, S. L. Zhang, M. Gupta, F. Shahmiri, D. Osorio, Y. Wang, Z. Wang, C. Zhang, T. Starner, B. Boots, ZL Wang, G. D. Abowd

Tied for 3^rd

“Mm-wave Ultra-Long-Range Energy-Autonomous Printed RFID      Van-Atta Wireless Gas Sensors: at the Crossroads of 5G and IoT”, Jimmy Hester and Prof. Manos Tentzeris

“Sensorized Pneumatic Muscles for Force and Stiffness Control”, Lucas O. Tiziani, Thomas W. Cahoon, and Frank L. Hammond III

About FHE at Georgia Tech:
Led by Prof. Suresh Sitaraman, the George W. Woodruff School of Mechanical Engineering, more than 30  researchers at Georgia Tech are involved in projects involving flexible electronics from the School of Mechanical Engineering, the School of Electrical and Computer Engineering, the School of Materials Science and Engineering, the H. Milton Stewart School of Industrial & Systems Engineering, the School of Chemical and Biomolecular Engineering, and the Wallace H. Coulter Department of Biomedical Engineering at Georgia Tech and Emory University. Several interdisciplinary research institutes at Georgia Tech are also involved in the projects, including the Institute for Electronics and Nanotechnology, Georgia Tech Manufacturing Institute, and the Institute for Materials.  The Office of Industry Collaboration and the College of Engineering are also actively engaged.

About NextFlex:
Formed in 2015 through a cooperative agreement between the US Department of Defense (DoD) and FlexTech Alliance, NextFlex is a consortium of companies, academic institutions, non-profits and state, local and federal governments with a shared goal of advancing U.S. Manufacturing of FHE. By adding electronics to new and unique materials that are part of our everyday lives in conjunction with the power of silicon ICs to create conformable and stretchable smart products, FHE is ushering in an era of “electronics on everything” and advancing the efficiency of our world.

- Christa M. Ernst
  {christa.ernst@ien.gatech.edu}

The 4 winning projects, from a diverse group of engineering disciplines, were awarded a six-month block of IEN cleanroom and lab access time. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in materials, biomedicine, energy production, and microelectronics packaging applications.

The Fall 2017 IEN Seed Grant Award winners are:

• Saswat Mishra (PI Woon-Hong Yeo, Woodruff School of Mechanical Engineering), Stretchable Hybrid Electronics for Wireless Monitoring of Salivary Electrolytes Assays
• Arith Rajapakse (PI Anna Erickson, Woodruff School of Mechanical Engineering), Ionizing Radiation Detection Using a Vertically Aligned Carbon Nanotube Array Transistor
• Nujhat Tasneem (PI Asif Khan, Electrical and Computer Engineering), Co-integration of Logic and Non-volatile Memory in Front-End-of-the-Line (FEOL) Processes
• Congshan Wan (PI Muhannad Bakir and Tom Gaylord, Electrical and Computer Engineering), First Circular Waveguide Grating-Via-Grating for Interlayer Optical Coupling

Awardees will present the results of their research efforts at the annual IEN User Day in 2018.

For more information about IEN cleanroom facilities, research capabilities, and collaboration opportunities please visit www.ien.gatech.edu.

Electromagnetic interference (EMI) is defined as unwanted electrical or magnetic coupling between components in a module or system. Such coupling or cross-talk results to performance degradation and electromagnetic compatibility issues. With increased multi-functional integration and miniaturization of emerging consumer, IoT, and automotive electronics, component-level EMI shielding has become extremely important to prevent undesired electromagnetic (EM) coupling.

EMI noise in traditional modules with large components is shielded by metallic cans or creating physical separation between them. Shielding with conformal metal coatings on overmolded packages has also been demonstrated. Component-level shielding has been developed with integrated via-based shields inside packages.

In contrast to the prior approaches described above, Georgia Tech team has recently pioneered innovative multi-layered structures for more effective EMI shielding. In the near field region, magnetic fields, generated from sources such as power inductors and transformers, have lower wave impedance and hence are difficult to be shielded with blanket sheets of a few micron thickness. To address this challenge, unique thin magnetic-nonmagnetic multi-layered structures, which lead to high shielding effectiveness, are developed. The primary shielding mechanism for such thin multi-layered shields is the multiple reflections that occur at interfaces between magnetic and conductive thin layers because of impedance mismatch. Furthermore, by employing copper as a conductive material, absorption loss also contributes to high shielding effectiveness.

The Georgia Tech team, in partnership with Tango Systems, has demonstrated this concept with ultra-thin (< 5 micron) multi-layered shield composed of copper (Cu), titanium (Ti), and nickel-iron (permalloy) for noise suppression of 100 kHz to 100 MHz from DC-DC converters as an example. In this frequency range, such multi-layer shields placed between two magnetic coils show higher isolation or less near-field inductive coupling than traditional shielding materials such as copper or nickel films. Multi-layered structures composed of Ti, Cu, and NiFe showed 59 dB isolation, or more than 20 dB shielding effectiveness, much greater than NiFe-Cu shield or the NiFe-Ti multi-layered structures. This approach is now extended for further improvement in shielding effectiveness performance by employing oxide layers such as alumina within the multi-layered structures.

In addition to those multi-layered shielding materials, Georgia Tech team has also been pioneering package-integrated copper via-trench structures for component-level shielding between sensitive RF components. Such shields are now custom-designed for isolation between transmission lines, RF inductors, also RF power amplifiers. Since undesired EM coupling occurs both from above and below the substrates, innovative trench shielding structures with through-substrate vias or micro-vias are designed and demonstrated with 2-4 GHz shielding of above 65 dB even with component separation of below 0.5 mm. Georgia Tech is now extending these trench-via array and multi-layered conductor structures to 5G and other mm-wave modules in the frequency range of 28 GHz to 39 GHz.

This research is being performed in partnership with a large global team of material and tool companies and with support from several on-site industry engineers at Georgia Tech.

This project is part of Georgia Tech industry consortium in System Scaling which includes about 40 end-user and supply chain companies and RF module companies.

About the Authors

Atom Watanabe is an ECE student pursuing his PhD under the advisement of Prof. Rao Tummala. His research focus is on 5G modules with advanced shielding structures. atom@gatech.edu 

Dr. P.M. Raj is the Program Manager for Integrated Passive and Actives as well as High-Temp Electronics at Georgia Tech PRC. raj@ece.gatech.edu

Prof. Rao Tummala is Joseph. M. Pettit Chair Professor in ECE and MSE and Director of Georgia Tech’s Packaging Research Center. rao.tummala@ece.gatech.edu.

High-temperature performance of molding compounds is becoming a key bottleneck for least three reasons: 1) integrated power modules with wide-bandgap (WBG) switches, gate drivers and controllers with ultra-high power densities, leading to escalating package temperatures; 2) under-the-hood automotive electronics; and 3) improvements in molded wafer and panel fan-out packages to address die drift, shrinkage and warpage issues.

Traditional molding compounds are limited to temperatures below 175°C. Although a number of polymer materials such as polyimide, cyanate ester, and benzocyclobutene (BCB) polymers offer high-temperature stability, epoxies are still the preferred choice because of several advantages that include excellent interfacial adhesion, low moisture absorption, excellent molding processibility and low cost. Recent advances include incorporation of multi-aromatic structures in the epoxy resin to enhance thermal stability of the cured composite. However, undesirable changes in material properties such as resin decomposition and the loss of volatile species become inevitable. Loss in mechanical toughness and oxidative-degradation still remain as the other major limitations with epoxies.

The Georgia Tech team, which includes polymer chemists, package processing and reliability experts, is developing higher temperature molding compounds with higher thermal stability stability, higher thermal conductivity, enhanced fracture toughness, and improved resistance to oxidative-degradation. Thermal stability of epoxies is being enhanced by incorporating thermally-stable functionalities derived from cyanate esters. The thermal conductivity of molding compounds is being enhanced with functionalized boron nitride fillers, while the fracture toughness of molding compounds is being enhanced with rubber-coated silica fillers that serve as crack-energy absorbers. The simultaneous synergy of enhancing the thermal stability, thermal conductivity and crack resistance provides unique opportunities to develop high-performance epoxy molding compounds to address some of the limitations of current wafer and panel fan-out packages as well as emerging high-power automotive electronics.

In addition to synthesizing the high-temperature molding compounds, the ongoing project will also focus on thermo-mechanical reliability including fracture characterization at various material interfaces up to 250°C. Thermo-mechanical models are also being used to determine stress/strain distribution as well as energy available for crack propagation in packages that use high-temperature mold compounds. Such models will be used to obtain design guidelines for high-temperature applications.

This project is part of Georgia Tech industry consortium in System Scaling which includes about 40 end-user and supply chain companies.

About the Authors

Chia-Chi Tuan is a PhD student under the advisement of Prof. CP Wong. Her research focus is on epoxy-based polymer composites. chiachituan@gatech.edu.

Dr. Jack Moon is a Research Engineer at the School of Materials Science and Engineering at Georgia Tech. jack.moon@gatech.edu.

Prof. CP Wong is the Regents' Professor and Smithgall Institute Endowed Chair at the School of Materials Science and Engineering at Georgia Tech. cp.wong@mse.gatech.edu.

Prof. Suresh Sitaraman is Morris M. Bryan Jr. Professor with George W. Woodruff School of Mechanical Engineering at Georgia Tech. suresh.sitaraman@me.gatech.edu.

Dr. Raj Pulugurtha is a Research Professor and Program Manager of RF, Power and High-Temperature Materials at GT PRC. raj.pulugurtha@ece.gatech.edu.  

Prof. Rao Tummala is Joseph. M. Pettit Chair Professor in ECE and MSE and Director of Georgia Tech’s Packaging Research Center. rao.tummala@ece.gatech.edu.

Advanced polymer materials are the key to high density packaging by enabling ultra-small vias and wiring layers to achieve 50 ohm impedance RDL wiring layers.

Traditional polymer dielectrics are thicker films (>20µm) and thus are unsuitable to RDL wiring layers at fine pitch and at 50 ohm impedance. Although liquid spin-on polymers such as Polyimide and PBO have been used widely in wafer level packaging, such materials are difficult to apply as thin dry films on large panels.

In contrast to these materials, Georgia Tech and its industry partners have been developing ultra-thin (3-10µm) dry film polymer materials and associated RDL via and line formation processes. Ultra-thin polymer dry films provide added benefits of better thickness control, improved planarization on underlying copper, large panel processing, and environmental friendliness. The Georgia Tech program involves a number of material partners in photo-sensitive from TOK Japan, dry film BCB from Dow Chemical, as well as non-photo dry film dielectrics from Ajinomoto Japan. The Georgia Tech programs that benefit from these polymer dielctrics include all digital applications using glass, advanced laminates and ceramic substrates.

The Georgia Tech team has demonstrated wafer and panel substrates with 2µm lines and spaces by advanced semi-additive processes (SAP) using 7µm thin dry film photo resists and projection lithography tool provided by Ushio Japan. Wafer and panel metallization was performed using a 300 mm panel plating line at Georgia Tech installed by Atotech, Germany. Various approaches are being investigated to demonstrate ultra-small micro-vias below 10µm including solid state UV laser, using a CornerStone™ system installed at Georgia Tech by ESI, excimer laser ablation supported by Suss Photonic Systems, photo lithography processes with advanced dry films provided by TOK Japan, Dow Chemical and other partners. By combining these materials and processes, multi-layer structures with 10µm vias and 2.5µm lines and spaces were successfully demonstrated to fabricate a 2.5D logic-HBM emulator designed with guidance from IBM/GlobalFoundries, AMD, Intel and others (top figure).

To address the limitations of SAP processes in pitch scaling,a novel via-in-trench (VIT) and via-in-line (VIL) embedded trench+via methods have been invented and demonstrated to achieve ultra-small liness and vias on large panels. Advantages of the embedded approach are the elimination of seed etching processes and the formation of conductive wires with higher aspect ratios for better electrical conductivity. Two different approaches are studied in the Georgia Tech program; excimer laser ablation by Suss Photonic Systems with non-photo polymer dielectrics and photolithography with photo-polymers. After the trench and via formation, trench and via fill plating from Atotech and a low-cost surface planarization process (tool installed at Georgia Tech by Disco Japan) to remove copper overburden were used to metallize the fine pitch RDL. Using this approach, 2µm lines and spaces with embedded vias have been successfully demonstrated (bottom figure).This is one of the first demonstrations of silicon-like RDL that Georgia Tech team achieved using glass panels with potential for lower cost Cu-polymer RDL materials and processes.

This research is being performed in partnership with a large global team of material and tool companies and with support from several on-site industry engineers at Georgia Tech.

This project is part of Georgia Tech industry consortium in System Scaling which includes about 40 end-user and supply chain companies.

About the Authors

Yuya Suzuki is a PhD student under the advisement of Prof. Rao Tummala. His research focus is on thin film dielectrics and small micro-vias. ysuzuki3@mail.gatech.edu.

Fuhan Liu is the Assistant Program Manager for Electronic and Photonic Substrates at Georgia Tech PRC. fliu@ece.gatech.edu

Dr. Venky Sundaram is the Program Manager of Substrate Programs and Associate Director of Industry Programs at Georgia Tech PRC. vs24@mail.gatech.edu

Prof. Rao Tummala is Joseph. M. Pettit Chair Professor in ECE and MSE and Director of Georgia Tech’s Packaging Research Center. rao.tummala@ece.gatech.edu.

The explosive growth of data traffic from increasing number of digital and sensor devices, connected to the network, and the escalating demand for self-driving cars requiring both long-range vehicle-to-network and short-range vehicle-to-vehicle connectivity, has created a need for 10-100X increase in wireless data communication rates beyond current 4G LTE connectivity. This extreme traffic density requires high-frequency mobile bands, much beyond WLAN at 6 GHz, requiring mm-wave (e.g., 28-39 GHz and above) communications. Many challenges in achieving these goals such as those associated with system-level design, materials, processes, antennas and module integration must be addressed.

Traditional mm-wave packages are based on ceramic substrates. The high cost and low-integration limitations of ceramics have led to the evolution of organic packages. A fully-integrated antenna-in-package (AiP) for W-band phased-array system, with 64 dual-polarization antennas embedded in a multi-layer organic substrate, with SiGe transceiver dies that are flipchip-attached has been demonstrated by IBM. In addition, ultra-low loss organic substrates using Teflon and LCPs were explored with high gains and high bandwidth. The evolution of embedded and fan-out wafer level ball grid array package technology (eWLB) further enhanced the performance of mm-wave packages by eliminating the wirebonds, as demonstrated by Infineon technologies, with SiGe-BiCMOS technology. However, organic laminates and molding-compound based fan-outs are limited by the precision and tolerance of circuitry for mm-wave components.

In contrast to the above approaches for 5G and beyond, Georgia Tech and its industry partners are pioneering ultra-thin, panel-based glass fan-out (GFO) embedded technology. GFO offers many advantages such as low electrical loss, superior dimensional stability for precision circuitry, stability to high temperature and humidity, matched CTE to Si and other devices and availability in thin and large glass panels processed with Cu-through vias, similar in dimensions to TSVs and RDL wiring layers, and similar to BEOL on Si. The Georgia Tech approach leads to major design, material, process and 3D package architecture innovations.

Some of the key research innovations of the Georgia Tech 5G and beyond program include:

1. Low-loss transmission with innovative waveguide structures on glass substrates with insertion losses approaching 0.05 dB/mm.
2. Formation of precision circuitry enabled by high dimensional stability and surface smoothness of glass resulting in further lowering of the losses.
3. Miniaturized and high bandwidth, high gain antenna arrays enabled by glass, in combination with ultra-low loss thinfilm polymers with initial results indicating that the bandwidth can be improved by 20% with a gain of 10 dBi than those on organic substrates.
4. Formation of via arrays in glass with double-side interconnections enabling compact passive elements such as couplers and filters.
5. Integrated power amplifiers with thermal management using large copper through-via structures in glass thus eliminating the hotspots and reliability issues with embedded high-power dies.
6. Feasibility of transparent RF electronics enabled by transparent glass substrates, transparent dielectrics and conductors in automotive windshields and windows.
7. Innovative materials and processes such as 3D printing on flex substrates being pioneered by Georgia Tech for low-cost IoT applications.
8. Innovative module integration of passives and actives with ultra-short interconnection length and ultra-small-vias in glass, resulting in very low via inductance, less than 50 pH and via-related transition losses, to less than 0.03 dB.

The 5G project is currently active in collaboration with many industry partners, including glass companies such as Corning Glass, Asahi Glass, and Schott Glass, supplying the ultra-thin glass panels; low-loss dielectric material suppliers such as Rogers; tool companies such as Ushio for precision lithography; Disco for planarization and dicing; Atotech for supplying the plating chemistry for advanced metallization processes; and end-users like Qualcomm. 

About the Authors

Atom Watanabe is a PhD student under the advisement of Prof. Rao Tummala. His research focus is on EMI shielding and mm-wave module integration; atom@gatech.edu.

Prof. Manos Tentzeris, Ken Byers Professor in ECE Department, Georgia Tech, is the faculty lead for the mm-wave program; etentze@ece.gatech.edu.

Prof. Rao Tummala is the Joseph M. Pettit Chair Professor in ECE and MSE, and the Director of Georgia Tech’s 3D Systems Packaging Research Center (GT PRC); rao.tummala@ece.gatech.edu.

Dr. Raj Pulugurtha is a Research Professor and the Program Manager of Power and RF Module Programs; pm86@mail.gatech.edu.

Dr. Venky Sundaram is a Research Professor and the Program Manager of Glass Substrate Program; vs24@mail.gatech.edu.

The proliferation of mobile devices, feeding the data to the cloud, has resulted in an unprecedented increase in global data traffic; projected to double to about six Exabytes (10¹⁸) per day by 2020. Electrical interconnects are limited for many reasons including device leakage, propagation delay, signal-to-signal crosstalk, reflection and others. Optical interconnects are immune to these and being photonic-based, are capable of meeting the above high bandwidth requirements. Unlike in long-distance telecommunications, short-distance bandwidth requires careful balance between performance, power and cost.

Silicon photonics and board-level optoelectronics are being intensely explored by the industry. Silicon photonics promises the highest potential by combining photonics and electronics onto a single die, using CMOS-compatible processes. Board-level optoelectronics, on the other hand, utilize low-cost board substrate process technologies to create Optical Printed Circuit Boards (O-PCB).

In contrast to these above approaches, Georgia Tech proposed and developed a very innovative 3D glass photonics (3DGP) technology, not at device or board-level, as with silicon and board-level photonics, but at package-level. It is a lower cost and low power alternative to silicon photonics and board-level optoelectronics. In addition, it is a 3D concept using glass with an ultra-short photonic via interconnection. Glass offers a unique combination of optical, electrical, thermo-mechanical and dimensional-stability properties for precision alignments, and large-area panel processability for low cost, unmatched by other materials. Optically, the refractive index of glass can match that of glass optical fibers to enable low-loss light coupling. Electrically, the low-loss tangent of glass is far superior to that of silicon. Mechanically, the Coefficient of Thermal Expansion (CTE) of glass matches silicon and other devices, thus improving the system-level reliability. The low surface roughness and high dimensional stability of glass is capable of 1µm and below features similar to back end of line (BEOL) silicon processes, for high interconnect density and precise coupling to optical fibers. Lastly, glass has the potential for low cost by virtue of large panel manufacturing

Recently, Georgia Tech’s 3DGP program demonstrated a 400 Gbps optical transceiver module. This test vehicle featured optimized electrical interconnects at < 0.1 dB/mm insertion loss, thermal interconnects to keep laser temperature under 80ºC, and novel optical interconnections comprising of planar optical waveguides, 3D vertical optical vias, 45º turning mirrors, and fiber alignment grooves in glass. These novel optical interconnections resulted in < 2 dB coupling loss with high-density out-of-plane turning, and alignment tolerance on par with fiber-to-fiber coupling.

The Georgia Tech industry consortium is unique in the academic world. It involves partnership with end-user and supply chain companies, resulting in accelerated 3DGP technology development. The end-users include TE Connectivity and Ciena Corp.; and supply chain companies include Corning Glass, Asahi Glass, and Schott Glass for supplying the ultra-thin glass panels with vias or cavities; Dow-Chemical for polymers; Ushio for placing a lithographic tool at Georgia Tech to enable micro-mirror formation; Atotech for supplying the chemistry for advanced metallization processes; Microchem for supplying optical polymers; and DISCO for placing a dicing tool at Georgia Tech to enable fiber alignment groove formation.

About the Authors

Bruce Chou, is graduating in Fall 2016 with his PhD under the advisement of Prof. Rao Tummala. His research focus is on Design and Demonstration of 3D Glass Photonics. cchou36@gatech.edu.

Prof. Rao Tummala is Joseph. M. Pettit Chair Professor in ECE and MSE and Director of Georgia Tech’s Packaging Research Center. rao.tummala@ece.gatech.edu.

Dr. Fuhan Liu is a Research Professor and Program Manager of Glass Photonics Program at GT PRC fuhan.liu@ece.gatech.edu.

Dr. Venky Sundaram is a Research Professor and Associate Director of Industry Programs at GT PRC vs24@mail.gatech.edu. 

All packages are fan-out packages with the exception of chip-scale or wafer-level packages. These fan-out packages fall into two categories: chip-first, also called embedded, and chip-last. Both provide wiring or RDL to connect to ICs at fine or coarse pitch. In the chip-first approach, RDL is deposited directly onto ICs thus requiring no assembly; in contrast, in the chip-last process, two separate processes, one to form RDL with or without a substrate and second to assemble ICs to the wiring layers.

Fan-out wafer-level packages (FO-WLP), as extension of wafer-level packages, provide RDL wiring and I/Os beyond ICs on the surface of molding compounds. These packages, therefore, are no longer limited by I/Os and are thus poised to disrupt the entire semiconductor industry due to their benefits in performance, due to ultra-short interconnections, and wafer-based manufacturing infrastructure availability, compared to traditional flip-chip or wire bond packages. Two sets of applications are driving the need for fan-out packages: 1) analog applications that include RF, mm-wave such as Radar, and power for consumer electronics, using smaller and thinner devices to achieve thin packages with high component densities; and 2) digital applications to embed processors with larger ICs at higher I/O densities. The scope of FO-WLP technology is being proposed and developed in recent years to include multi-component SiP modules and integrated logic and 3D memory stacks to achieve high bandwidth.

But wafer fan out, as practiced today, has three major limitations: High cost, small Package size and low I/O density. Cost and package size limitations are due to small 300 mm wafers from which these fan-out packages are produced and low I/O density due to molding compound-driven challenges.

To address some of these concerns, panel-fanout Packaging (FO PLP) is beginning to emerge as a major new frontier. The economies of scale of panel-based processing may reduce FO-WLP cost by as much as 2-4x, depending on the package size, with the number of dies per package, the number of RDL layers and the panel size. FO PLP technologies can be broadly classified into two categories: 1) PWB infrastructure-based panel fan-out such as Imbera’s Integrated Module Board (IMB), AT&S’s Embedded Components Packaging (ECP), and ASE’s advanced – Embedded Assembly Solution Integration (a-EASI); Amkor and J-Devices Wide Strip Panel Fan-out Package (WFOP); and 2) LCD infrastructure-based panel fan-out that include PTI’s molded fan-out using 370mm x 470mm panels, and most recently by Samsung LSI, Samsung Display and SEMCO by repurposing idled Gen 3.25 (600mm x 720mm) and Gen 4 (730mm x 920mm) LCD lines. 

Thev next generation of panel fan-out evolution must address three barriers:

1. Interconnect gap for digital applications
2. Thickness or miniaturization gap for analog, power, RF and mm-wave, and
3. Thermal and power gap for high-power applications.

Georgia Tech and its 50 industry partners are developing next generation of panel fan-out in both chip-first and chip-last approaches to address these barriers, not only for computing and communications applications, but also for high-temperature and high-power automotive applications. In contrast to the wafer fan-out with molding compounds and laminate-based panel fan-outs, both can generally be referred to as organic-based, Georgia Tech’s approach is based on inorganic panel fan-out, either with glass as GFO or poly-silicon fan-out as PSFO.

The Georgia Tech Glass Fan-out (GFO) approach addresses the interconnect gap with Si BEOL-like wiring, currently at 20 µm pitch. In addition, GFO provides lower interconnect loss, and higher board-level reliability even with large package sizes. The silicon-like dimensional stability of glass in large-panel manufacturing brings an unparalleled combination of ultra-high I/O density, ultra-high electrical performance, ultra-high reliability at low and high-temperature and low cost, not possible in molding compound-based or laminate-based fan-out technologies. With the low-loss of glass, being a factor of ~2-3x better than molding compounds, Georgia Tech’s GFO approach is ideal for RF and mm-wave modules. Unlike large high-density fan-out packages that require another package such as organic BGA package to connect to boards, GFO packages are designed to be directly SMT-attached to the board, enabled by the tailorability of the CTE of the glass panels and compliant interconnections. Lastly, the ultra-smooth surface and high dimensional stability of glass enables silicon-like RDL capability on large panels, for the first time, with less than 2µm critical dimensions (CD) for high density fan-out applications.

The GFO project is part of Georgia Tech’s industry consortium, supported by a number of industry partners, including Corning Glass, Asahi Glass, and Schott Glass that supply ultra-thin glass panels with cavities; Ushio that has placed a panel lithographic tool at Georgia Tech; Atotech that provides the plating chemistry for advanced metallization; and DISCO that has placed a low-cost planarization tool at Georgia Tech. End user applications for GFO in the Georgia Tech consortium include 5G, automotive camera and RADAR modules, low- and high-power modules, and logic-to-3D memory modules.

About the Authors

Tailong Shi is a PhD student under the advisement of Prof. Rao Tummala. His research focus is on Design and Demonstration of glass fan-out (GFO) packages for 77GHz automotive RADAR and Camera modules. tshi@gatech.edu.

Dr. Venky Sundaram is a Research Professor and the Associate Director of Industry Programs at Georgia Tech PRC. vs24@mail.gatech.edu.

Dr. Fuhan Liu is a Research Professor and an Assistant Program Manager for the GFO program. fuhan.liu@ece.gatech.edu. 

Dr. Vanessa Smet is a Research Professor and the Program Manager for the Interconnections & Assembly (I&A) and High-power program. vanessa.smet@prc.gatech.edu.

Prof. Rao Tummala is the Joseph M. Pettit Chair Professor in ECE and MSE, and the Director of Georgia Tech’s 3D Systems Packaging Research Center (GT PRC). rao.tummala@ece.gatech.edu.   

The 4 winning projects, from a diverse group of engineering disciplines, were awarded a six month block of IEN cleanroom and lab access time. In keeping with the interdisciplinary mission of IEN, the projects that will be enabled by the grants include research in materials, biomedicine, nanoelectronics, and packaging applications.

The Spring 2016 IEN Seed Grant Award winners are:

• Moez Aziz (PI Hua Wang, Electrical and Computer Engineering), Developing Cellular Sample Delivery and Isolation Techniques on the Integrated CMOS Nanoelectronic Platform
• Meredith Fay (PI Wilbur Lam, Biomedical Engineering), How Do White Blood Cells Talk to Each Other? Leveraging Microfabricated Systems to Investigate Direct Neutrophil-to-Neutrophil Communication
• Augustus Lang (PI John Reynolds, Chemistry and Biochemistry & Materials Science and Engineering), Electrofunctional Paper: Flexible Paper-Based Displays
• Amar Mohabir and Sterling Smith (undergraduate)(PI Mike Filler, Chemical & Biomolecular Engineering), Plasmonic-Phononic Hybrid Nanoparticles: New Materials for Extreme Infrared Light Focusing

Awardees will present the results of their research efforts at the annual IEN User Day in 2017.

For more information about IEN cleanroom facilities, research capabilities, and collaboration opportunities please visit www.ien.gatech.edu.

Georgia Tech’s 3D IPAC approach enables 2X shrinkage in X-Y form factor and 2X smaller in thickness than LTCC and organic modules.It also enables superior performance from high-Q LC integration with better than 5% tolerance from precision lithography in contrast to ceramic modules, lower-loss interconnections between components leading to insertion losses of <0.5 dB. Glass provides ultra-smooth and dimensionally-stable substrates for high-throughput and large-area (1000 mm) panel processing with low cost. These advances are expected to enable the miniaturization, integration, performance and cost demands for emerging 5G front-end modules and their convergence with IoT and automotive communications.

Georgia Tech proposed 3D Integrated Passive and Active Component (3D IPAC) based glass RF modules and 3D IPDs in 2013, for unparalleled miniaturization, performance and cost. The 3D IPAC RF Module starts with an ultra-thin substrate (30-100 microns) made of glass, with ultra-low electrical loss and ultra-short through-package vias for double-side assembly of active and passive components separated by only about 50 µm in interconnect length. Actives and passives are embedded or assembled double-side on the glass using ultra-short, low-temperature and fine-pith copper interconnections. The module also integrates thermal and shielding functions with innovative structures and materials.

Several technology breakthroughs were accomplished to demonstrate such RF IPDs and modules. High-density through-vias in bare glass were formed from unique via-machining techniques by Georgia Tech’s partners such as Corning and Asahi Glass. Innovative tools and processes were developed for large glass panel handling with thinfilm low-loss build-up dielectrics, in partnership with Georgia Tech’s consortium members such as Atotech, NGK-NTK, Shinko and Unimicron. Advanced 3D TPV-based inductor designs were developed for high Q and high-density inductors, while inorganic nanodielectrics and nanomagneto dielectrics were utilized for further miniaturization of capacitors, inductors and EMI shield structures. Precision panel-level lithography was achieved for accurate microwave impedance matching with less than 5% tolerance. Double-side assembly was also demonstrated with such ultra-thin glass substrates.

Georgia Tech’s 3D IPD-based diplexers are 4X thinner compared to traditional approaches, with similar performance. With advanced thinfilm and high-density passive components, and design innovations, much superior performance is targeted in the next phase of the R&D program from 2016-2018. Georgia Tech and its partners also demonstrated ultra-miniaturized LTE and WLAN modules with its 3D IPAC approach with double-side integration of LNA, switch and filters. Good model-to-hardware correlations were seen from the module characterization of LNA gain and entry-to-exit insertion loss, illustrating the performance benefits of 3D IPAC modules. In the next phase, Georgia Tech is extending this concept further to complete PAMiD module integration with integrated thermal and shielding structures for LTE FDD/TDD, 5G and mm wave applications.

For more information about Georgia Tech’s Integrated Passives and Actives, please contact Prof. Rao Tummala at rao.tummala@ece.gatech.edu or Dr. P.M. Raj at raj.pulugurtha@prc.gatech.edu.

About the Authors

Dr. Raj Pulugurtha is the Program Manager for Integrated Passive and Actives as well as High-Temp Electronics at Georgia Tech PRC. raj.pulugurtha@prc.gatech.edu

Dr. Rao Tummala is Director of Georgia Tech’s Packaging Research Center. He is also a Chaired Professor in ECE and MSE. rao.tummala@ece.gatech.edu. 

Georgia Tech was the first to start glass packaging five years ago as the next generation packaging technology after plastic or leadframe packaging in the 1970s, ceramic packaging in 1980s, and organic build-up in the 1990s. Georgia Tech proposed glass packaging as a superior packaging platform due to its improved electrical properties including low dielectric constant and low dielectric loss, thermal expansion match to silicon ICs, smooth surface finish, low moisture absorption, and availability in ultra-thin and large form factors without grinding. Georgia Tech identified and addressed three fundamental limitations of glass packaging that included low thermal conductivity, TSV-like through via formation at fine pitch and low cost, and mechanical brittleness.

Currently, Georgia Tech is designing and demonstrating glass packaging for a variety of applications including digital, RF, power, flexible electronics and automotive applications.

The goal of Georgia Tech’s 2.5D glass interposer is to serve high-performance computing markets including networks, graphics and as the interconnect platform for split SOCs, as announced by IBM, AMD and now Intel. These markets share a common set of system requirements—low latency, ultra-high interconnect density for ultra-high bandwidth, low-power interconnections, large package size, and low cost. Currently, silicon interposer is the only commercially-available technology that begins to address these system needs. Silicon interposers, while they provide suitable interconnect density, suffer from high signal losses due to dielectric and conductor losses and high cost due to small 300 mm size wafer processing and manufacturing, as well as the need for an organic BGA package between the interposer and system board. Organic interposers are being developed to overcome these limitations of silicon interposers, but are fundamentally limited in I/O density over the long term. Georgia Tech’s glass interposer, in contrast, is made up of 100 micron thin glass, which is available in large panel or roll-to-roll form, with through via at as low as 30 micron pitch and fine-pitch RDL with microvias at less than 10 microns—enabling 40 micron chip-level I/O pitch in development and 20 micron pitch in research.

Georgia Tech and its industry partners are designing and developing 2.5D glass interposer BGA packages with the following strategic advantages:

• High electrical performance achieved using low permittivity and low loss dielectrics to fabricate multilayer RDL wiring lines at 6 micron line pitch with 3 micron line lithography leading to 40 micron bump pitch, enabling short, high-density die-to-die interconnections with 0.12 dB/mm line insertion loss at 2 GHz.
• Low interconnect losses achieved by reducing dielectric and conductor losses using low loss dielectrics and thick copper conductive lines, compared to BEOL. As a result, line insertion losses for high-speed, off-package interconnects as low as 0.05 dB/mm are achieved—a 6X reduction compared to similar results reported with silicon interposers.
• High reliability using unique interposer fabrication and assembly technologies
• High density interconnections since glass behaves like silicon in its surface smoothness and dimensional stability in minimizing line lithography, line pitch and I/O pitch. The Georgia Tech program has recently demonstrated 3 micron wiring lines with via-in-pad technology at 40 micron I/O bump, targeting 20 micron pitch in 2016.

Direct board-level attachment of 2.5D glass interposer BGA: Unlike silicon interposer, which requires organic BGA for assembly to PCB, direct attachment of a glass interposer BGA to board has been demonstrated by the Georgia Tech team using a 18.5 mm glass BGA package size. The stresses due to CTE mismatch between the glass and board are managed by a variety of stress buffer approaches.

Cost: The cost of glass interposer package is expected to be similar to organic packages in high volume by utilizing large panels that are 5-10x larger than 300 mm silicon wafers. In addition to large panel processing to reduce cost, the Georgia Tech process uses low cost materials and dryfilm processes, double-side advanced semi-additive plating, large area lithography, high-speed plating, and panel scalable die assembly technologies.

The Georgia Tech glass packaging R&D is unique in the academic world. It involves partnership with manufacturing supply chain and end-user companies, resulting in accelerated 2.5D glass interposer package R&D. Corning and Asahi Glass, for example, have both developed high throughput roll-to-roll glass panel manufacturing as well as high throughput through-via processes and prepared them for volume manufacturing. Other supply chain manufacturing contributions to accelerate 2.5D fabrication development include: Ushio’s lithographic tool placed at Georgia Tech for 2 micron line lithography, SUSS MicroTec’s projection excimer laser ablation for microvias at less than 10 microns, Atotech’s differential seed layer etch for advanced SAP, as well as Shinko’s and Unimicron’s glass substrate prototype fabrication using panel manufacturing processes.

The current design and demonstration focus is the fabrication of low cost advanced RDL and TCB chip assembly processes, resulting in the first 2.5D glass interposer package prototype shown above.

The next focus is to apply this interposer technology for high bandwidth logic-to-memory applications working with semiconductor and system companies

For more information about Georgia Tech’s glass packaging technology, please contact Prof. Rao Tummala at rao.tummala@ece.gatech.edu.

About the Authors

Brett Sawyer, is a 4^th year ECE student pursuing his PhD under the advisement of Prof. Rao Tummala. His research focus is on Modeling, Design, and Fabrication of 2.5D Glass Interposer. bsawyer@gatech.edu.

Dr. Rao Tummala is Director of Georgia Tech’s Packaging Research Center. He is also a Chaired Professor in ECE and MSE. rao.tummala@ece.gatech.edu.

Dr. Venky Sundaram is Program Manager for Glass Substrate at GT PRC and research faculty in ECE. vs24@mail.gatech.edu. 

On August 28, U.S. Secretary of Defense Ashton Carter announced the award, which will go to the San Jose-based FlexTech Alliance, a research consortium and trade association that will create and manage the FHE-MII, which includes companies, laboratories and non-profit organizations, universities and state and regional organizations from across the United States.

While the Manufacturing Innovation Institute will be headquartered in San Jose, existing nodes around the country already have in place an infrastructure ready to solve some of the known manufacturing challenges. The Institute will distribute R&D funds via competitively bid project calls. Industry-generated technology roadmaps will drive project calls, timelines and investments.

“The strength of the Institute will stem from the strong support and previous work of our partner organizations,” said Malcolm Thompson, executive director of the FHE MII. “Georgia Tech’s advanced work and broad understanding in so many of the Institute’s key manufacturing thrusts – including electronic systems modeling and design, printed electronics, and packaging, assembly, test, and reliability assessment – will provide great benefits to both of our organizations.”

Georgia Tech’s FHE MII activities will be led by Suresh Sitaraman, a professor in the George W. Woodruff School of Mechanical Engineering. The effort will include faculty from the School of Electrical and Computer Engineering, School of Mechanical Engineering, School of Materials Science and Engineering, and School of Industrial and Systems Engineering. Support will also come from the Institute of Electronics and Nanotechnology, the Georgia Tech Manufacturing Institute, the Institute of Materials and the Office of Industry Collaboration.

“Georgia Tech brings to the FHE MII a depth of expertise, outstanding innovation, and excellent infrastructure to address a wide range of technology challenges associated with flexible hybrid electronics,” said Sitaraman. “At the FHE MII, the ongoing research at Georgia Tech will be integrated into technology demonstrator platforms and scaled up into the early-stage manufacturing prototype line. Thus, the FHE MII will facilitate the transition of the technologies developed at Georgia Tech and elsewhere around the country into real-world and use-inspired applications.”

Flexible electronics are circuits and systems that can be bent, folded, stretched or conformed without losing their functionality. Hybrid electronics involves a mix of elements such as logic, memory, sensors, batteries, antennas, and various passives which may be printed or assembled on flexible substrates. Combined with low-cost manufacturing processes, flexible hybrid electronics will present an entirely new paradigm for a wide range of electronics used in health care, consumer, automotive, aerospace, energy, defense, as well as other applications. Thus, flexible hybrid electronics will provide a pervasive and powerful technology platform to address some of society’s greatest challenges associated with food supply, clean water, clean energy, education, information, and safety and security.

“Imagine skin-like electronic patches with sensors that can wirelessly alert when a pilot is fatigued, smart and flexible wrappers that can monitor the quality of food, and tablets that can be folded and kept in your pocket,” said Sitaraman. “Many of these ideas are in various stages of research today, and only through an effective manufacturing pathway will these innovative research pursuits be transitioned into viable products.”

The new initiative leverages Georgia Tech’s broad expertise in manufacturing and electronics technologies, said Stephen E. Cross, Georgia Tech’s executive vice president for research.

“There is a recognized need to bolster the U.S. manufacturing sector. We will exploit our research base in flexible hybrid electronics and work with industry in a collaborative way to create new domestic jobs in Georgia and the U.S.,” Cross said. “We look forward to working with the FlexTech Alliance to leverage our unique resources and attributes in this field to spur technology development and innovation leading to economic and workforce development in Georgia and the Southeast.”

The new institute is part of the National Network for Manufacturing Innovation program (NNMI). The FHE MII is the seventh MII announced—the fifth under Department of Defense management. The NNMI program is an initiative of the Obama Administration to support advanced manufacturing in the U.S. Each institute is part of a growing network dedicated to securing U.S. leadership in the emerging technologies required to win the next generation of advanced manufacturing. Bridging the gap between applied research and large-scale product manufacturing, the institutes bring together companies, universities, other academic and training institutions, and federal agencies to co-invest in technology areas that benefit the nation’s commercial and national defense interests.

According to Thompson, the MII will bring together the country’s best scientists, engineers, manufacturing experts and business development professionals in the field of flexible hybrid electronics. Under the FlexTech initiative, the San Jose hub provides overall program direction, is the integrator of components, creates prototypes, and matures manufacturing readiness levels. “Fast start” projects for equipment, materials, devices and other vital components will make use of existing node facilities and key personnel from around the country.

To complement the San Jose hub, key technology nodes will be linked and include IC thinning, system design and fabrication, integration and assembly, and flexible hybrid electronics applications. Several regional nodes have been recognized and more are expected. Those currently aligned to the Institute are centers and educational institutions throughout California, along with Alabama, Arizona, Arkansas, Connecticut, Georgia, Indiana, Massachusetts, Michigan, New York, North Dakota, Ohio and Texas. The academic lead organizations for the System Design and Fabrication Node are Georgia Tech and the University of Texas, Austin.

The FlexTech Alliance is a leading industry association focused on growth, profitability and success throughout the manufacturing and distribution chain of flexible, printed electronics and displays. By facilitating collaboration between and among industry, government, and academia, the FlexTech Alliance develops solutions for advancing these technologies from R&D to commercialization. For more information on FlexTech Alliance, visit www.flextech.org.

Research News
Georgia Institute of Technology
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Media Relations Contact: John Toon (404-894-6986) (jtoon@gatech.edu).

In a paper published in the Journal of Applied Physics, a team of researchers at the Georgia Tech Research Institute (GTRI) and Honeywell International have demonstrated a new device that allows more electrodes to be placed on a chip – an important step that could help increase qubit densities and bring us one step closer to a quantum computer that can simulate molecules or perform other algorithms of interest.

"To write down the quantum state of a system of just 300 qubits, you would need 2^300 numbers, roughly the number of protons in the known universe, so no amount of Moore's Law scaling will ever make it possible for a classical computer to process that many numbers," said Nicholas Guise, a GTRI research scientist who led the research. "This is why it's impossible to fully simulate even a modest sized quantum system, let alone something like chemistry of complex molecules, unless we can build a quantum computer to do it."

While existing computers use classical bits of information, quantum computers use "quantum bits" or qubits to store information. Classical bits use either a 0 or 1, but a qubit, exploiting a weird quantum property called superposition, can actually be in both 0 and 1 simultaneously, allowing much more information to be encoded. Since qubits can be correlated with each other in a way that classical bits cannot, they allow a new sort of massively parallel computation, but only if many qubits at a time can be produced and controlled. The challenge that the field has faced is scaling this technology up, much like moving from the first transistors to the first computers.

One leading qubit candidate is individual ions trapped inside a vacuum chamber and manipulated with lasers. The scalability of current trap architectures is limited since the connections for the electrodes needed to generate the trapping fields come at the edge of the chip, and their number are therefore limited by the chip perimeter.

The GTRI/Honeywell approach uses new microfabrication techniques that allow more electrodes to fit onto the chip while preserving the laser access needed.

The team's design borrows ideas from a type of packaging called a ball grid array (BGA) that is used to mount integrated circuits. The ball grid array's key feature is that it can bring electrical signals directly from the backside of the mount to the surface, thus increasing the potential density of electrical connections.

The researchers also freed up more chip space by replacing area-intensive surface or edge capacitors with trench capacitors and strategically moving wire connections.

The space-saving moves allowed tight focusing of an addressing laser beam for fast operations on single qubits. Despite early difficulties bonding the chips, a solution was developed in collaboration with Honeywell, and the device was trapping ions from the very first day.

The team was excited with the results. "Ions are very sensitive to stray electric fields and other noise sources, and a few microns of the wrong material in the wrong place can ruin a trap. But when we ran the BGA trap through a series of benchmarking tests we were pleasantly surprised that it performed at least as well as all our previous traps," Guise said.

Working with trapped ion qubits currently requires a room full of bulky equipment and several graduate students to make it all run properly, so the researchers say much work remains to be done to shrink the technology. The BGA project demonstrated that it's possible to fit more and more electrodes on a surface trap chip while wiring them from the back of the chip in a compact and extensible way. However, there are a host of engineering challenges that still need to be addressed to turn this into a miniaturized, robust and nicely packaged system that would enable quantum computing, the researchers say.

In the meantime, these advances have applications beyond quantum computing. "We all hope that someday quantum computers will fulfill their vast promise, and this research gets us one step closer to that," Guise said. "But another reason that we work on such difficult problems is that it forces us to come up with solutions that may be useful elsewhere. For example, microfabrication techniques like those demonstrated here for ion traps are also very relevant for making miniature atomic devices like sensors, magnetometers and chip-scale atomic clocks."

This work was funded by the Intelligence Advanced Research Projects Activity (IARPA).

The article, "Ball-grid array architecture for microfabricated ion traps," is authored by Nicholas D. Guise, Spencer D. Fallek, Kelly E. Stevens, K. R. Brown, Curtis Volin, Alexa W. Harter, Jason M. Amini, Robert E. Higashi, Son Thai Lu, Helen M. Chanhvongsak, Thi A. Nguyen, Matthew S. Marcus, Thomas R. Ohnstein and Daniel W. Youngner. It appears in the Journal of Applied Physics and can be accessed at: http://scitation.aip.org/content/aip/journal/jap/117/17/10.1063/1.4917385

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Media Relations Contacts: John Toon (404-894-6986) (jtoon@gatech.edu) or Lance Wallace (404-407-7280) (lance.wallace@gtri.gatech.edu).

Article written by the American Institute of Physics.

Dr. Christian’s visit kicked off at the Georgia Tech Research Institute (GTRI) with a briefing on various research initiatives in a meeting led by Dr. Stephen Cross, Georgia Tech Executive Vice President for Research and GTRI Director.

“We are proud of our alumnus, Dr. Thomas Christian, for the many important civilian leadership positions he has held in the United States Air Force, including since November 2014 as the Director of the Air Force Office of Scientific Research," said Cross.  “Tom's infectious enthusiasm for high quality scientific and technological pursuit coupled with innovative exploration to translate research results into use is inspirational. We appreciated the time he took to visit us, especially the time he spent with our young investigators.”

Dr. Christian then made several stops around campus, including the Institute for Electronics and Nanotechnologies, the Manufacturing Institute, and the Institute for Materials. The two-day visit also included a briefing with the Georgia Tech School of Aerospace Engineering, led by school chair Dr. Vigor Yang. Dr. Christian received his B.S., M.S., and Ph.D. from the GT Aerospace Engineering School in 1968, 1970, and 1974, respectively. To round out his visit to Georgia Tech, Dr. Christian joined several faculty and staff for a discussion on how to attract graduate students for post-doctorate work at AFOSR, led by Dr. Laurence Jacobs, Associate Dean of the College of Engineering.

Georgia Tech has a long history of supporting AFOSR and the Air Force’s overall mission. In 2014, AFOSR’s 60^th anniversary monograph highlighted two Georgia Tech projects: a technology development program on active flow control concepts for future improvements to the C-17’s propulsion system (1988-1995, led by mechanical engineering professor Dr. Ari Glezer), and the development of an environmentally friendly aluminum and ice propelled rocket (2007-2009, collaborative team included aerospace engineering school chair Dr. Vigor Yang). In the last state fiscal year (July 2013 to June 2014), Georgia Tech has conducted more than $206 million of work for the United States Air Force and has won nearly $11 million in contracts from AFOSR since July 2013.

Much of Dr. Christian’s early career was spent in Warner Robins, Ga. In March 2013, he was named associate deputy Assistant Secretary (Science, Technology and Engineering), Office of the Assistant Secretary of the Air Force for Acquisition, at the Pentagon. In November 2014, he was appointed to the director’s position of the AFOSR. For more information about Dr. Christian or AFOSR, please visit www.afosr.af.mil.

FPGAs are integrated circuits whose hardware can be reconfigured – even partially during run-time – enabling users to create their own customized, evolving microelectronic designs. They combine hardware performance and software flexibility so well that they're increasingly used in aerospace, defense, consumer devices, high-performance computing, vehicles, medical devices, and other applications.

But these feature-rich devices come with potential vulnerabilities – the very configurability of an FPGA can be used to compromise its security. The slightest tweak, accidental or malicious, to the internal configuration of a programmable device can drastically affect its functionality. Conversely, when security and trust assurances can be established for these devices, they can provide increased, higher-performance resilience against cyber attacks than difficult-to-assure software-based protections.

The GTRI researchers have identified multiple issues that could become serious threats as these devices become increasingly common.

"Because FPGAs are programmable and they tightly couple software and hardware interfaces, there's concern they may introduce a whole new class of vulnerabilities compared to other microelectronic devices," said Lee W. Lerner, a researcher who leads the GTRI team studying FPGA security. "There are entirely new attack vectors to consider, ones that lie outside the traditional computer security mindset."

Conventional protections such as software or network-based security measures could be undermined by altering the logic of a system utilizing programmable devices.

"The potential to access and modify the underlying hardware of a system is like hacker Nirvana," Lerner said.

Traditional hardware security evaluation practices – such as X-raying chips to look for threats built-in during manufacturing – are of little use since an FPGA could be infected with Trojan logic or malware after system deployment. Most programmable devices are still at risk, including those embedded in autonomous vehicles, critical infrastructure, wearable computing devices, and in the Internet of Things, a term that refers to online control devices ranging from smart thermostats to industrial systems.

Myriad Possibilities

FPGA chips are constructed from heterogeneous logic blocks such as digital signal processors, block memory, processor cores, and arrays of programmable electronic logic gates. They also include a vast interconnected array that implements signal routing between logic blocks. Their functionality is dictated by the latest configuration bitstream downloaded to the device, commonly referred to as a design.

An FPGA's adaptability gives it clear advantages over the familiar application-specific integrated circuit (ASIC), which comes from the foundry with its functionality permanently etched in silicon. Unlike an ASIC, for instance, an FPGA containing some sort of error can often be quickly fixed in the field. One example application which utilizes this flexibility well is software-defined radio, where an FPGA can function as one type of signal-processing circuit and then quickly morph into another to support a different type of waveform.

The earliest FPGAs appeared 30 years ago, and today their logic circuits can replicate a wide range of reconfigurable devices including entire central processing units and other microprocessors. New internal configurations are using high-level programming languages and synthesis tools, or low-level hardware description languages and implementation tools, which can reassemble an FPGA's internal structures.

Depending on how they are set up, FPGAs can be configured from external sources or even internally by sub-processes. Lerner refers to their internal configuration capability as a type of "self-surgery" – an analogy for how risky it can be.

Additionally, because FPGA architectures are so dense and heterogeneous, it's very difficult to fully utilize all their resources with any single design, he explained.

"For instance, there are many possibilities for how to make connections between logic elements," he said. "Unselected or unused resources can be used for nefarious things like implementing a Trojan function or creating an internal antenna."

Anticipating Attacks

To exploit an FPGA's vast resources, bad actors might find ways to break into the device or steal design information. Lerner and his team are investigating ways in which hackers might gain the critical knowledge necessary to compromise a chip.

One potential avenue of attack involves "side-channels" – physical properties of circuit operation that can be monitored externally. A knowledgeable enemy could probe side-channels, such as electromagnetic fields or sounds emitted by a working device, and potentially gain enough information about its internal operations to crack even mathematically sound encryption methods used to protect the design.

In another scenario, third-party intellectual property modules or even design tools from FPGA manufacturers could harbor malicious functionality; such modules and tools typically operate using proprietary formats that are difficult to verify. Alternatively, a rogue employee or intruder could simply walk up to a board and reprogram an FPGA by accessing working external test points. In some systems, wireless attacks are a possibility as well.

FPGAs even contend with physical phenomena to maintain steady operation. Most reprogrammable chips are susceptible to radiation-induced upsets. Incoming gamma rays or high-energy particles could flip configuration values, altering the design function.

Lerner points to a real-world example: Google Glass, the well-known head-mounted optical technology, which uses an FPGA to control its display.

Multiple Security Techniques

To provide assurance in programmable logic designs, Lerner and his team are developing multiple techniques, such as:

• Innovative visualization methods that enable displaying/identifying/navigating patterns in massive logic designs that could include hundreds of thousands of nodes and connections;
• Applications of high-level formal analysis tools, which aid the validation and verification process;
• System-level computer simulations focused on emulating how heterogeneous microelectronics like FPGAs function alongside other system components.

The GTRI team is also engaged in other areas of research that support design security analysis, including exact- and fuzzy-pattern matching, graph analytics, machine learning / emergent behavior, logic reduction, waveform simulation, and large graph visualization.

The team also researches architectures to support trustworthy embedded computing in a variety of applications, such as cyber-physical control. They have developed the Trustworthy Autonomic Interface Guardian Architecture (TAIGA), a digital measure that is mapped onto a configurable chip such as an FPGA and is wrapped around the interfaces of process controllers. Its goal is to establish a "root-of-trust" in the system, a term that refers to a set of functions that can always be trusted, in this case to preserve system safety and security.

TAIGA monitors how an embedded controller process is functioning within the system, to assure that it's controlling the process within specification. Because TAIGA can detect if something is trying to tamper with the physical process under control, it removes the need to fully trust other more vulnerable parts of the system such as supervisory software processes or even the control code itself.

"TAIGA ensures process stability – even if that requires overriding commands from the processor or supervisory nodes," Lerner said. "It's analogous to the autonomic nervous system of the body, which keeps your heart beating and your lungs respiring – the basic things that your body should be doing to be in a stable state, regardless of anything else that's going on."

The team has installed a version of the TAIGA system on a small robot running the Linux operating system. Georgia Tech students and other interested persons are invited to manipulate the installation and the robot online to try to compromise its control system at the team’s main website, http://configlab.gatech.edu, when the experiment is ready.

"We provide formal assurances that TAIGA will prevent anyone from hacking critical control processes and causing the robot to perform actions deemed unsafe," Lerner said. "However, if someone figures out how to run the robot into a wall or damage its cargo, for instance, then obviously we'll know we have more work to do."

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A team at the Georgia Tech Research Institute (GTRI) has designed a new approach that could lead to bathymetric lidars that are much smaller and more efficient than the current full-size systems. The new technology, developed under the Active Electro-Optical Intelligence, Surveillance and Reconnaissance (AEO-ISR) project, would let modest-sized unmanned aerial vehicles (UAVs) carry bathymetric lidars, lowering costs substantially. 

And, unlike currently available systems, AEO-ISR technology is designed to gather and transmit data in real time, allowing it to produce high-resolution 3-D undersea imagery with greater speed, accuracy, and usability.

These advanced capabilities could support a range of military uses such as anti-mine and anti-submarine intelligence and nautical charting, as well as civilian mapping tasks. In addition, GTRI’s new lidar could probe forested areas to detect objects under thick canopies.

"Lidar has completely revolutionized the way that ISR is done in the military – and also the way that precision mapping is done in the commercial world," said Grady Tuell, a principal research scientist who is leading the work. "GTRI has extensive experience in atmospheric lidar going back 30 years, and we're now bringing that knowledge to bear on a growing need for small, real-time bathymetric lidar systems."

Tuell and his team have developed a new GTRI lightweight lidar, a prototype that has successfully demonstrated AEO-ISR techniques in the laboratory. The team has also completed a design for a deployable mid-size bathymetric device that is less than half the size and weight of current systems and needs half the electric power.

Measuring Laser Light

To simulate the movement of an actual aircraft, the prototype must be "flown" over a laboratory pool. To do this, the researchers install the lidar onto a gantry above a large water tank in Georgia Tech’s Woodruff School of Mechanical Engineering and then operate it in a manner that simulates flight.

The lidar utilizes a high-power green laser that can penetrate water to considerable depths. Firing a laser beam every 10,000th of a second, the proxy aircraft allows the team to study the best methods for producing accurate images of objects on the floor of the pool.

The ultimate goal is to obtain accurate reflectance from the sea floor, but the presence of water makes that difficult. To capture good images, the GTRI lightweight lidar must make a series of adjustments that let it measure reflected laser beams as if there were no water present.

One challenge is that when a tightly focused light beam such as a laser hits water, it loses speed and bends, a familiar underwater effect called refraction. Due to changes in the water's surface, the angle of refraction varies constantly, and these changes in the refracted angle must be accounted for when computing the path of the light.

Another challenge is that the photons in the laser beam scatter in the water, like light from a car headlight hitting fog. The amount of this scattering depends on the water’s turbidity, which refers to the number of particles suspended in it. In addition, the water absorbs some of the light. 

Because of these two effects, a lidar system receives back only a tiny signal when its laser beam bounces off an underwater surface such as the sea floor. The signal-conditioning and sensor-processing capabilities of the lightweight lidar must be sophisticated enough to detect that small returning signal in an overall sea and air environment that is very noisy – meaning that it's filled with extraneous signals that interfere with the desired data.

Improving Critical Techniques

The ultimate product of a bathymetric lidar is a three-dimensional point cloud that describes the seafloor at high spatial resolution. Users of these data need to know the accuracy of each point.

GTRI’s researchers have devised a new approach for accuracy assessment called total propagated uncertainty (TPU). Using statistics, calculus, and linear algebra, the TPU technique propagates errors from the individual measurements – navigation, distance, and refraction angle – to estimate the accuracy of sea-floor measurements.

In a major milestone, the GTRI team was the first to demonstrate bathymetric lidar coordinate computation and TPU estimates in real time. To achieve the necessary processing speed, the team employs a mixed-mode computing environment composed of field programmable gate arrays (FPGAs), along with central-processing and graphics-processing units.

Each time a laser is fired, Tuell explained, it takes only a few nanoseconds for the beam to reach the bottom of the pool and bounce back. Once the beam returns, the lidar's high-speed computer digitizes the returned beam and computes ranges, coordinates, and TPU before the next shot of the laser. 

"In our laboratory tests, we're computing about 37 million points per second – which is exceptionally fast for a lidar system and gives us a great deal of information about the sea floor in a very short period of time," Tuell said. "The key is we're using FPGAs to do the necessary signal conditioning and signal processing, and we're doing it at exactly the time that we convert from an analog signal to a digital signal."

A Deployable Design

In addition to developing the proof-of-concept lidar prototype, the GTRI team has produced a CAD design for a deployable bathymetric device that is half the size and weight of current devices and has lower power needs. The immediate goal is to field such a mid-size device on a larger UAV such as an autonomous helicopter.

The longer-term aim is to use AEO-ISR technology to develop bathymetric lidars that could fly on small UAVs with payloads of 30 pounds or less. To help these lidars deliver maritime surveillance and mapping data in real time, most of the necessary signal processing would be done on the aircraft and only essential data would be transmitted to ground stations.

"We've provided a prototype that demonstrates the key technology, and we've completed a design for a mid-size design," Tuell said. "In the future, we believe small bathymetric lidars will perform military tasks, and also civilian tasks such as county-level mapping, with increased convenience and at greatly reduced cost."

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Before new updates are fielded, however, they must be thoroughly tested to make sure the software performs as expected. Thanks to collaboration between researchers at the Georgia Tech Research Institute (GTRI) and the Army Reprogramming Analysis Team (ARAT), that testing can now be done in a new integrated support station (ISS) that puts the software through its paces under conditions simulating actual aircraft operation.

Using a standard AN/AAR-57 system unit and associated sensors, the new ISS allows the Army to test software updates under a wide range of scenarios and conditions to make sure it will perform as expected on Army aircraft.

“The ISS creates an environment by feeding data to the sensors, simulating threats and monitoring the responses that the unit makes to the simulated threats,” said William Miller, a GTRI senior research scientist who leads the project. “The ISS then correlates the results to make sure the system’s responses are what should be expected from the threat information fed into the system.”

The ISS development was part of a multi-phase program that transferred sustainment of the AN/AAR-57 software from the system’s original equipment manufacturer to the Army. GTRI has been involved in the effort since 2010, working closely with ARAT program staff and leaders housed on the Georgia Tech campus in Atlanta.

Development of the new AN/AAR-57 ISS involved software development, system documentation and reverse-engineering of the 1990s-era components where documentation no longer existed. Project goals also included addressing system obsolescence issues in the original ISS units.

“As a result of this project, the Army now has a complete process that they can follow based on the research we did with them over the past four years,” Miller added.

Missile attacks on low-flying helicopters typically take place over a short period of time, so the unit has to perform rapidly and at top efficiency. Once activated, the AN/AAR-57 can operate automatically without intervention from the crew.

“A missile warning system looks at the environment, picks up potential threats, and over a very short period of time determines whether or not there is an actual threat approaching an Army rotary-wing or fixed-wing aircraft,” Miller said. “If the system determines that there is a threat, it controls the dispensing of countermeasures. This happens so quickly that a pilot would not be able to detect the threat manually or respond manually.”

The project produced three ISS units. Two of the units have been delivered to the Army’s Aberdeen Proving Ground laboratories, where they are already in use. A third unit now at ARAT/GTRI’s Atlanta laboratories is scheduled to be delivered in the fall.

The project involved nearly 60 GTRI researchers at various stages of the work. Now that the three ISS units have been built, the researchers are working on other aspects of support for the Army’s AN/AAR-57 – including development of the next-generation of ISS. The AN/AAR-57 is used on the CH-47 Chinook, UH-60 Black Hawk and AH-64 Apache helicopters, and on various fixed-wing platforms.

The location of ARAT staff and leadership on the Georgia Tech campus has created a unique collaborative environment in which advances can be made quickly. “Because we are working side-by-side with them, we are in constant communication about the needs of the Army and how we can efficiently support their efforts,” said Miller. “It really is a team effort.”

For the GTRI researchers, the project provides not only an interesting technical challenge – but also a deeper reward.

“What we are doing is certainly interesting technical work, but the results go out into the field to save the lives of our soldiers and allow them to return home to their families,” said Miller. “All of us enjoy doing challenging engineering work, but when we stand back and look at what’s really happening here, saving lives is the rewarding part.”

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Department of Defense representatives were in attendance during a recent event where two of the low-power devices, which can change beam directions in a thousandth of a second, were demonstrated in an aircraft during flight tests held in Virginia during February 2014. One device, looking up, maintained a satellite data connection as the aircraft changed headings, banked and rolled, while the other antenna looked down to track electromagnetic emitters on the ground.

“We were able to sustain communication with the commercial satellite in flight as the aircraft changed headings dramatically,” explained Matthew Habib, a GTRI research engineer. “The antenna was changing beam directions to compensate for the aircraft headings. At the same time, we were maintaining communication with a device on the ground.”

In addition to rapidly altering its beam direction, the antenna’s frequency and polarization can also be changed by switching active components. The prototype used in this test operates from 500 to 3000 MHz with a plus or minus 60-degree hemispherical view. The latest prototypes have been able to provide gain to 6 GHz, opening more communication options to the end user. For the flight test, GTRI collaborated with SR Technologies, Inc. (SRT), a Florida company specializing in wireless engineering products.  SRT provides mobile communications hardware including L-Band mobile satellite, 802.11 (WiFi), and cellular solutions. 

For this effort, the A3 was matched with an SRT software defined radio focused on the L-Band mobile satellite frequency range. GTRI also collaborated with Aurora Flight Sciences to fly the antennas on their Centaur optionally piloted aircraft. 

Beyond its ability to be easily reconfigured, the low power consumption and flat form make the Agile Aperture Antenna ideal for aircraft such as UAVs that have small power supplies and limited surface area for integrating antennas.

“If you have a large ship or aircraft with lots of power, you can afford to use a phased-array or other type of steerable antenna,” noted Habib. “But when you are using small vehicles, especially robotic aircraft and self-sustaining vehicles that don’t include an operator, our antenna is a great solution.”

Composed of printed circuit boards, the antenna components weigh just two or three pounds.

“It’s not just about the low power and weight,” said James Strates, also a GTRI research engineer. “The simplicity of the system, the low fabrication cost and the ability to retrofit the A3 to an existing system also make it attractive to operators.”

Beyond use on aircraft, ships and ground vehicles, the antenna concept could also find application in mobile devices, where the dynamic tunability could help cut through congestion on cellular networks, noted Ryan Westafer, a GTRI research engineer.

“A small electronically tunable antenna could provide a lot of new opportunities for mobile devices,” he said.

As configured for the flight tests, the upward-looking A3 antenna had a beam 30 degrees wide that could be shifted up to 60 degrees in either direction to maintain contact with the satellite. For the downward-looking antenna, the beam was automatically adjusted to “stare” at a point on the ground, reducing the interference from nearby emitters, Westafer explained.

Because it doesn’t require mechanically moving a metal dish, the A3 can change beam direction 120 degrees in a thousandth of a second, which gives it a significant response time advantage over gimbaled antennas.

The A3’s weight and complexity are also much less than for a phased-array antenna with similar capabilities. The A3 antenna uses just one static feed point, while a phased-array must feed and control each element separately. Because of its low power consumption, the A3 requires no cooling system.

The Agile Aperture Antenna has also been tested on a Wave Glider autonomous ocean vehicle. Together with previous testing on a moving ground vehicle, the new evaluations demonstrate the operational flexibility of the antenna, Habib said. So far, the A3 has operated successfully at temperatures as low as 10 degrees below zero Fahrenheit, and as high as 100 degrees Fahrenheit.

To track the satellite, the antenna uses an inertial measurement unit to provide information about the aircraft’s pitch, roll and yaw – as well as its longitude, latitude and altitude. That information is sent to a controller that turns elements off and on to the change the beam direction to maintain communication. Before takeoff, the researchers had programmed into the device the location of the commercial satellite with which it was communicating.

The challenge ahead is to take advantage of the antenna’s unique capabilities – and to affect the way operators place antennas onto ground, air and sea vehicles.

“This is changing the way that we think about integrating antennas onto systems to provide new solutions,” Habib said. “Users have not had these capabilities before, and we are excited to see how our partners will be able to take full advantage of this antenna.”

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Georgia Tech entered into a partnership with French governmental entities in 1990 to establish its first international campus in Metz, France. After two decades of innovative educational achievements, a world-class research presence was added in 2006 with the creation of the Georgia Tech-Centre National de la Recherche Scientifique (CNRS) Unité Mixte Internationale laboratory. 

Georgia Tech is now moving to the next critical stage of expansion of its global influence with the creation of an innovation platform, the Institut Lafayette. By providing access to a state-of-the-art technology infrastructure; by sharing world-class expertise in science and technology; and by offering business model validation and commercialization tools, the Institut Lafayette will showcase and underscore Georgia Tech’s capacity to help create a full regional ecosystem which can generate innovations of economic and social value for its international partners.

This expansion of Georgia Tech’s global footprint will increase its impact around the globe, and serve to bring the world to Georgia Tech and to the State of Georgia. The Institut Lafayette will create opportunities to establish alliances with universities, companies, and governmental and non-governmental entities whose goals and activities align with Georgia Tech’s strategic mission. This expansion will also significantly augment the teaching, research and entrepreneurial activities of Georgia Tech’s faculty, staff, alumni and students both in Atlanta and in Lorraine. The new facilities also expand the European activities of the Georgia Tech Center for Organic Photonics and Electronics (Georgia Tech-COPE). The Institut Lafayette is expected to serve as a catalyst for economic development in the region of Lorraine and to increase trade exchange opportunities with metropolitan Atlanta, and the State of Georgia.

Located adjacent to the existing Georgia Tech-Lorraine building, the brand new 25,000 square foot facility is comprised of offices, laboratories and a 5,000 square foot clean room, fully equipped with state-of-the-art nanofabrication tools to support innovations in optoelectronics and advanced semiconductor materials research. This facility will be managed by Georgia Tech faculty members who are world-renown experts in organic materials and semiconductors.

This innovation platform will provide a unique combination of research expertise, an advanced technology infrastructure, and an array of technology transfer services which will increase efficiency and accelerate technology transfer.  Its impact and effectiveness will be further enabled by leveraging the resources of Georgia Tech – The Georgia Tech Enterprise Innovation Institute (EI2) will provide expertise in technology transfer and commercialization, and the Institute of Electronics and Nanotechnology (IEN) will provide expertise in managing and operating high-technology infrastructures.

The Institut Lafayette was named after the Marquis de Lafayette, a French aristocrat and military officer who served as a major-general in the Continental Army under George Washington in the American Revolution.   It was in Metz in 1775 that the Marquis de Lafayette made the decision to commit himself to the cause of American independence.

Despite the great potential, however, quantum computing faces many significant challenges, including controlling the qubits and isolating them from a noisy environment. Scientists and engineers at the Georgia Tech Research Institute (GTRI) are helping address those challenges by designing, fabricating and testing new components and devices aimed at supporting international quantum computing efforts.

GTRI’s Quantum Information Systems (QIS) Branch uses individual trapped atomic ions as qubits in its research. In collaboration with university and industry partners, QIS scientists recently demonstrated two new ion traps, including one that uses a system of integrated mirrors to read data from multiple ions. The researchers also advanced concepts for integrating the electronic systems needed to control the ion traps inside the vacuum containers within which the traps operate. The research was sponsored by the Intelligence Advanced Research Projects Activity (IARPA) through the Army Research Office (ARO) and the Space and Naval Warfare Systems Command (SPAWAR).

“We have a wide interest in developing the technologies needed by the field and using those technologies to perform the science needed to make advancements in quantum computing,” said Alexa Harter, chief scientist of GTRI’s Advanced Concepts Laboratory and head of the Quantum Information Systems Branch. “These are all projects that move us farther along the path of integration and technology development.”

On its website, the Quantum Information Systems Branch displays diagrams for a dozen micro-fabricated ion traps, each with special properties, many of them intended to work with other devices also designed by the group. The planar ion traps are based on silicon VLSI technology and are both fabricated and tested at GTRI. The ion traps and other quantum components developed in GTRI are shared with collaborators and others in the community who are focused on the same goal.

“We now have a very impressive tool kit of technologies, techniques and systems that can be integrated for use by us and our collaborators,” said Curtis Volin, a GTRI principal research scientist in the Quantum Information Systems Branch. “Our ultimate objective is to understand what would be necessary to build a quantum computer.”

Among the recent accomplishments:

• In collaboration with Griffith University in Australia, researchers developed ion traps with integrated diffractive mirrors. High fidelity ion qubit measurements are performed by collecting laser-induced ion fluorescence, but the speed of these measurements is limited by the ability to collect the emitted light. Integrating micro-mirrors into the traps provides a more efficient way to measure the internal states of the ions by allowing more of the photons they produce to be collected. In conventional ion traps, there is only one large lens to collect data from a single ion.

“To advance quantum computing, not only do you need to trap the ions, but you also need to be able to control them and read information from them,” Volin explained. “With these integrated mirrors, we can look at as many qubits as we want, eliminating one of the obstacles to quantum research.”

The micro-mirror traps have been designed, fabricated and tested.

• The researchers have designed a new micro-fabricated ion trap with integrated microwave elements for manipulating the coherent states of ion chains. Directly manipulating qubits with microwave fields reduces system complexity and sensitivity to emission decoherence.

• Working with colleagues at Honeywell, the researchers developed a technique for integrating the electronics that control the ion traps into the devices so they can operate within vacuum chambers. That will allow an increase in the number of leads that control the ion trap, and facilitate efforts to scale up the systems to accommodate larger numbers of ions.

“We are taking these components to a new level of integration,” Harter said. “If you want to make quantum sensors that can be used in the field or develop a quantum computer of larger size, you will need to integrate the optics and electronics.”

The integrated electronic interface was fabricated using unique facilities at Honeywell. It replaced banks of electronic equipment, and could potentially allow thousands of leads to be connected.

Harter says GTRI’s niche is to work with both academic and industrial researchers to bring engineering approaches to the quantum physics discoveries coming out of labs around the world.

“The basic physics research being done on campuses around the country requires a lot of engineering to make advances in quantum computing,” she said. “Much of what we do is really engineering these basic systems that we want to make available to our collaborators.”

GTRI’s Quantum Information Systems Branch is composed of 15 scientists, engineers and students who investigate the physics of trapped ions, develop micro-fabricated ion traps and model quantum architectures, Harter noted. The group also has collaborations with academic scientists at Georgia Tech.

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“It’s estimated that each year U.S. farmers lose 12 percent of their crops to pests and another 12 percent to diseases,” said Gary McMurray, division chief of GTRI’s Food Processing Technology Division.

To identify potential threats to crop health, farmers typically look for physical symptoms of disease, such as discolored or wilting leaves. However, in many cases, by the time these symptoms are visible, the plant is already dead or dying. And the culprit pathogen may have already spread to nearby plants, threatening the health of the entire crop.

“The key is to give farmers the ability to get early diagnostic results, which allows them to take action before it’s too late,” said McMurray.

GTRI’s micro gas chromatograph is a GC-on-chip device. Its separation column, where the gas interacts with the polymer coated on the interior walls, is about the size of a quarter, and the thermal conductive detector is about half the size of a penny. When the two are combined, the device itself is about the size of a 9-volt battery.

McMurray said the goal is to be able to fit dozens of micro GCs on a ground robot that a farmer could then use in crop fields to take samples from plant to plant and get results in minutes.

“The idea is to have the robot be a mobile chemical laboratory that provides real-time data to the farmer. The robot provides a simple way to collect the data in an unstructured environment like a farm,” said McMurray.

Because all plants and pathogens emit volatile organic compounds (VOCs), these emissions can be used as chemical markers for rapid detection. Building the micro GC was the easy part, said Jie Xu, GTRI senior research scientist. The challenge now, she explained, is correlating the VOCs emitted from plants to their health status.

“It’s relatively easy to detect VOCs, but we still have a long way to go to interpret changes in plant VOC mixtures,” said Xu.

The difficulty lies in understanding how plants react to local environmental conditions. For example, changes in temperature, humidity, and soil moisture and nutrient levels, all have an effect on VOC emissions.

To determine if the emissions are due to a pathogen, a chemical signature has to be established by studying VOCs released under these different environmental conditions.

Researchers plan to conduct field tests using a benchtop model of the micro GC in summer 2014. Working with colleagues at the USDA’s Agricultural Research Service, they will test peach trees for Peachtree Root Rot disease at the Southeastern Fruit and Tree Nut Research Laboratory in Byron, Ga. The goal is to collect air and soil samples that can be analyzed to identify the disease’s chemical signature.

McMurray said a portion of the collected samples will be retained for additional laboratory tests with a traditional GC-MS to confirm the effectiveness of the micro GC. The team will then pursue efforts to integrate it into an autonomous robotic platform for crop field sampling and VOC data analysis.

“Real-time data from sensing technologies like the micro GC, when used in conjunction with other data collected on the farm, could revolutionize the ability of farmers to identify sick plants before any physical symptoms appear,” added McMurray.

Earlier detection also means earlier intervention, which could ultimately translate into a boon for America’s farmers. “If we could cut in half the 12 percent of crop losses due to diseases, farmers could potentially realize billions of dollars more in revenue each year,” said McMurray.

In addition to agricultural applications, the micro GC could potentially be used for homeland security monitoring to detect chemical threats, such as gases in subways and dangerous explosives in vehicles.

The micro GC project is being conducted in collaboration with researchers at GTRI, Georgia Tech’s George W. Woodruff School of Mechanical Engineering and the Parker H. Petit Institute for Bioengineering and Bioscience, the Department of Plant Pathology in the University of Georgia’s College of Agricultural and Environmental Sciences, and the USDA’s Agricultural Research Service.

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Media Relations Contacts: Lance Wallace (lance.wallace@gtri.gatech.edu) (404-407-7280) or John Toon (jtoon@gatech.edu) (404-894-6986).

Writer: Angela Colar

The current design integrates nanotechnology and radio-frequency identification (RFID) capabilities into a small working prototype. An array of sensors uses carbon nanotubes and other nanomaterials to detect specific chemicals, while an RFID integrated circuit informs users about the presence and concentrations of those vapors at a safe distance wirelessly.

Because it is based on programmable digital technology, the RFID component can provide greater security, reliability and range – and much smaller size – than earlier sensor designs based on non-programmable analog technology. The present GTRI prototype is 10 centimeters square, but further designs are expected to squeeze a multiple-sensor array and an RFID chip into a one-millimeter-square device printable on paper or on flexible, durable substrates such as liquid crystal polymer.

“Production of these devices promises to become so inexpensive that they could be used by the thousands in the field to look for telltale chemicals such as ammonia, which is associated with explosives," said Xiaojuan (Judy) Song, a GTRI senior research scientist who is principal investigator on the project. "This remote capability would inform soldiers or first responders about numerous hazards before they encountered them."

Wireless sensors could also be valuable for identifying and understanding air pollution, she said. Inexpensive sensors that detect ammonia and nitrogen oxides (NOx) could be fielded in large numbers, giving scientists increased knowledge of the location and intensity of pollutants.

The availability of such chips might also help companies detect food spoilage. And healthcare facilities could benefit, as the presence of telltale chemicals informed caregivers of patient conditions and needs.

The present prototype contains three sensors along with an RFID chip. Future devices for field use might contain a much larger number of sensors based on various nanomaterials – including carbon nanotubes, graphene and molybdenum disulfide – depending on the types of chemicals to be detected.

"In general, having an extensive sensing array is the best approach," Song said. "For real-world applications, a variety of sensors offers better functionality, because they can work together to produce a more detailed and reliable picture of the chemical environment."

The RFID component in the GTRI device makes use of the 5.8 gigahertz (GHz) radio frequency, one of several radio bands reserved for industrial, scientific and medical (ISM) purposes. The GTRI component is believed to be the first RFID system that exploits this frequency. 

The advantage of 5.8 GHz technology is that it will let RFID tags be made extremely small – in the area of one centimeter square, said Christopher Valenta, a GTRI research engineer who is co-principal investigator on the project. He explained that the digital transmission of data from RFID-based sensors does a much better job than earlier analog techniques based on interpretation of radio-frequency waveforms.

Specifically, digital signaling with 5.8 GHz RFID offers:

• Greater security due to digital techniques that prevent unauthorized access to the wireless data stream;
• Increased resistance to interference from materials such as metals that can cause false readings;
• Digital-logic readings of chemical concentrations that are more precise and easier to interpret than analog approaches;
• Longer-range communication capability.

The GTRI team is currently gearing up to design a very small, 5.8 GHz RFID component. After fabrication and testing, the chip could be manufactured in large numbers inexpensively.

"It might take $400,000 to design and fabricate that first RFID chip, but all the subsequent copies might cost only a few pennies," said Valenta, who is a Ph.D. candidate in the School of Electrical and Computer Engineering.

The GTRI team successfully tested its prototype sensing system in a demonstration designed to resemble an airport checkpoint. The sensor array detected the targeted chemical despite emersion in a complex chemical environment, and the RFID component was able to transmit the sensors' readings.

The present GTRI prototype is semi-passive, so it requires power from an incoming signal beam in order to send data back to a remote reading device. However, future sensing devices might exploit ambient energy from solar or vibrational sources that would let them work at longer ranges with greater sensitivity.

The team is continuing to work on the important task of developing pattern recognition software that will support effective functioning of the sensor array.

"The prototype 5.8 GHz wireless sensing system promises to be flexible and highly scalable," Valenta said. "An advanced design might include an array of 10 or more different sensors, with electronics that could utilize those sensors to perform 25 different jobs, and yet still be tiny, robust and inexpensive." 

Research News
Georgia Institute of Technology
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Media Relations Contacts: Lance Wallace (lance.wallace@gtri.gatech.edu) (404-407-7280) or John Toon (jtoon@gatech.edu) (404-894-6986).

Writer: Rick Robinson

Dr. Yee graduated with a B.S. in Mechanical Engineering (2007) and then an M.S. in Nuclear Engineering (2008) from The Ohio State University. He was a Department of Energy Advanced Fuel Cell Cycle Initiative Fellow (2007) and was also awarded prestigious the Hertz Fellowship (2008) to support his research in energy. Dr. Yee graduated with a Ph.D. (2013) in Mechanical Engineering from the University of California Berkley. During that time, he assisted in forming the Department of Energy’s Advanced Research Project Agency – Energy (ARPA-E) as it’s first Fellow.

Now at Georgia Tech, Dr. Yee is focused on taking fundamental scientific principles, applying them to interesting materials, leveraging unique manufacturing strengths, and producing low-cost, scalable, energy conversion technologies.

For example, by understanding how heat and energy flow through materials, energy conversion mechanisms and processes can be integrated into functional devices. These devices include thermoelectric generators, solid-state coolers, pyroelectric converters, alpha- and beta-voltaics, multi-ferroic and -caloric systems, and photovoltaics. 

In the near-term, Dr. Yee is developing polymer thermoelectrics that leverage the low cost of conducting polymers to make scalable thermoelectric generators. This work is inherently interdisciplinary involving backgrounds in synthetic chemistry, polymer physics, condensed matter physics, soft-material science, and materials characterization.

According to Dr. Yee, “With >60% of primary energy being discarded as heat, inexpensive methods of converting heat directly to electricity allow for greater efficiency and utilization of energy resources. A polymer thermoelectric generator is one new technology that is capable of doing this at scale.”

Ultimately, Dr. Yee hopes to impact the world by creating new energy technologies and training the next generation of energy technologists and educators.  To do this, he mentors students at the intersection of technology, policy, and business where they prepare for careers in government as technology policists, in start-ups as technical executives, and in academia as professors.

As a thank you to the people who have contributed and made the Center possible, Georgia Tech-COPE will be hosting a 10th Anniversary Symposium on March 14, 2014 at the Georgia Tech Global Learning Center.   

Keynote speakers: 

• Antoine Kahn (Princeton University), "Chemical Doping in Organic Semiconductors"
• Ching Tang (University of Rochester), "OLED - The Next Generation Display Technology"
• Valy Vardeny (University of Utah), "Organic Spintronics"
• Vivian Wing-Wah Yam (University of Hong Kong), "Versatile Chromophoric Building Blocks - From Design to Supramolecular Assembly and Materials"

View the Agenda.

Faculty, alumni, corporate and government partners, students, researchers and university administrators are all invited to participate. RSVP (required to attend) for the Symposium. 

Participants at Symposium have the opportunity to:

• Learn about cutting-edge research from world-renowned faculty members
• Learn about research and products being worked on at partner companies
• Meet top students and graduates who are prepared for the workforce
• Discuss emerging trends with recognized experts in the field
• Find knowledge and ideas to solve challenging problems
• Connect with global researchers and companies

The Symposium will take place at the Georgia Tech Global Learning Center. Lodging is available at teh Renaissance Atlanta Midtown Hotel or at nearby hotels. 

The Center (PRC) is led by professors from various schools of the College of Engineering. They will be collaborating with Korea Advanced Institute of Science and Technology (KAIST), a top academic institute in Korea, and GigaLane, a wireless module and package company in Korea.

This international partnership will focus on developing ultra-miniaturized, low-cost and high-performance long term evolution (LTE) front-end modules. Using Georgia Tech’s innovative Integrated Passive and Active Components glass package concept, these modules will have multi-band radios integrating miniaturized active and passive components.

Their research will also include the integration of multiple bands for global roaming in glass packages with a large reduction in form factor, cost, and power consumption.

“GT PRC, KAIST and GigaLane partnership is a very unique global collaboration model in that KAIST will design, GT PRC will develop and GigaLane will commercialize the most advanced WLAN and LTE modules. It is a perfect fit to what we are trying to do in GT PRC — explore, demonstrate and commercialize new technologies by means of global collaborations involving universities, industry and government,” said Center Director Rao Tummala, a professor in the School of Electrical and Computer Engineering, in a news release.

The Packaging Research Center was established in 1994 as a U.S. National Science Foundation Engineering Research Center. Since then, it has been the largest global research center dedicated to System-on Package technologies. Its research vision is to explore and demonstrate new fundamental concepts in all the core technologies necessary to achieve highest functionality at smallest size and lowest cost for electronic and bio-electronic 3D systems by embedded thin film components and high density interconnections at nanoscale.

Researchers at the Georgia Tech Research Institute (GTRI) produced the arrays using unique technology that grows bundles of vertically-aligned nanotubes embedded in silicon chips. In future versions of electrically-powered ion thrusters, electrons emitted from the carbon nanotube tips may be used to ionize a gaseous propellant such as xenon. The ionized gas would then be ejected through a nozzle to provide thrust for moving a satellite in space.

“The mission will characterize how well these field emission electron sources operate in the space environment relative to how well they work on the ground in vacuum chamber,” said Jud Ready, a GTRI principal research engineer. “Launch vibrations and exposure to a space environment that includes atomic oxygen and micrometeorites could have some unusual effects on the arrays. This mission will help us evaluate whether these carbon nanotube electron emitters could be used in ion thrusters.”

Existing ion thrusters rely on thermionic cathodes, which use high temperatures generated by electrical current to produce electrons. These devices require significant amounts of electricity to generate the heat, and must consume a portion of the propellant for their operation.
If the carbon nanotube arrays can be used as electron emitters, they would operate at lower temperatures with less power – and without using the limited on-board propellant. That could allow longer mission times for satellites, or reduce the weight of the micro-propulsion systems.

The carbon nanotube arrays are part of ALICE, a CubeSat micro-satellite developed and built by the Air Force Institute of Technology at Wright-Patterson Air Force Base in Ohio. On a mission scheduled for Dec. 5 from Vandenberg Air Force Base in California, ALICE will ride into space on an Atlas V rocket being used to launch a separate and much larger payload. Just 10 by 10 by 30 centimeters in size, ALICE will be part of an array of eight CubeSats – so named because they fit into small modular launchers attached to the main satellite.

The work could lead to improved micro-propulsion systems useful to small spacecraft, said Jonathan Black, director of the Center for Space Research and Assurance at AFIT.

“Technology like the devices being tested on ALICE is essential to our future ability to maneuver micro satellites or change their orbits,” he explained. “Being able to incorporate propulsion into microsatellites like CubeSats increases mission longevity and the types of missions they can perform. Successful demonstrations of advanced technologies like those being flown on ALICE will ultimately lead to smaller, lighter and more energy-efficient propulsion, resulting in decreased launch costs while increasing the performance of all satellites using electric propulsion.”

Utilizing a multi-departmental team, AFIT engineers in the Electrical Engineering Department developed a payload to directly expose the carbon nanotube arrays to the space environment while protecting an identical control array within the satellite. The arrays, which are approximately one centimeter square, will be switched on and off and their behavior studied. The payload experiment utilizes a sensor device known as the Integrated Miniaturized Electromagnetic Analyzer (iMESA), designed by engineers at the U.S. Air Force Academy (USAFA). The data collected from the satellite will be downloaded and processed at AFIT by students and technicians in the Department of Aeronautics and Astronautics.

The carbon nanotube arrays are excellent conductors and their geometry makes them ideal electron emitters.

“We use carbon nanotubes because they have a high aspect ratio and provide a nanoscale point that emits the electrons,” said Graham Sanborn, who worked on the project as part of his Ph.D. thesis in Georgia Tech’s School of Materials Science and Engineering. “The electric field focuses on the tip so we are able to get electron emission at lower voltages than might be required for other materials.”

GTRI uses a series of deposition and etching steps to fabricate the arrays in clean rooms at Georgia Tech. Each one-centimeter square array contains as many as 50,000 nanotube bundles, and each bundle is grown from a five-micron pit etched into the silicon.

“The design has specific geometry to prevent electrical shorting between electrodes that are very close together,” explained Sanborn.

Spacecraft are launched using chemical rockets that provide large amounts of thrust. Once in orbit, however, the vehicles can use electrically-powered thrusters to change orbits or make other maneuvers.

“Ion thrusters provide very low amounts of thrust,” Sanborn said. “They are just pushing out gas molecules, but they operate very efficiently. Ion thrusters can operate for thousands of hours at a time. Cumulatively, you can achieve a significant velocity change.”

The ALICE acronym is composed of several other acronyms. The “A” represents AFIT, while the “L” is for LEO – the low Earth orbit where the satellite will operate. The “I” represents the iMESA system; the “C” is for the carbon nanotubes, while the “E” represents “Experiment.”

The satellite, the first for AFIT, was designed, tested and integrated by a multi-departmental team of professors, students and technicians. The partnership with GTRI and USAFA provided students in each institution an opportunity to participate in ground-breaking research with the potential to impact numerous future satellites employing electric propulsion.

Other potential applications for Georgia Tech’s CNT-based electron emitters include displays, electrodynamic tethers, vacuum electronics and traveling wave tubes.

Research News
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Media Relations Contacts: John Toon (404-894-6986)(jtoon@gatech.edu) or Lance Wallace (404-407-7280)(lance.wallace@gtri.gatech.edu).

Writer: John Toon

The work is part of the U.S. Navy's Future Airborne Capability Environment (FACE™) project. The Navy’s FACE team is working with the FACE consortium, a government, industry and academia consortium managed by The Open Group®, to develop a new technical standard that governs how avionics software communicates with other avionics software and hardware components – to control aircraft sensors, effectors and other mission critical systems to deliver warfighting capability. 

Georgia Tech’s support of the FACE project is funded by the Naval Air Systems Command (NAVAIR) Air Combat Electronics Program Office (PMA-209) and the U.S. Army Aviation and Missile Research Development and Engineering Center (AMRDEC). Georgia Tech's work principally involves validating and maturing the FACE Technical Standard by producing reference software built according to the new FACE standards. 

"The FACE standard lets us streamline software production and software upgrades, which are vital for keeping U.S. pilots safe and delivering our military capabilities," said Douglas Woods, a research scientist leading the work at the Georgia Tech Research Institute (GTRI), Georgia Tech’s applied research arm. "In tackling this important work, we created a one-Georgia Tech team, uniting expertise from both GTRI and the School of Electrical and Computer Engineering.

“Basically, the FACE standard dictates how everything should fit together,” Woods said. “The FACE Technical Standard lets developers connect software and hardware in a uniform way, so that one software application can work with a variety of different hardware.”

The digital control portion of an avionics system is similar in some ways to the familiar personal computer, explained Woods, who is working on the FACE project with professor George Riley of the School of Electrical and Computer Engineering. That's because both computers and avionics use application software that runs on processing hardware; the application software communicates with the hardware via intermediary software known as an operating system.

Unlike a PC, however, the application software and operating system of an avionics system are very compact and robust for safety, security and performance reasons. 

For decades, these embedded applications have been uniquely designed to work with the specific operating system and hardware components contained in a given avionics system. Thus, the application software embedded in an avionics device worked with that device only, requiring significant rework or redundant development when similar capability is needed on new hardware or different hardware from another source.

This specialized software has also resulted in software modification having to be performed by the company or companies that created the software/hardware combination in the first place, reducing the opportunity for future competition.

That's where the FACE concept comes in. The FACE architecture specifies that designers use application programming interfaces (APIs) that are essentially a standardized software layer that translates between the application on one level and the other software applications, the operating system and hardware at other levels. The result is that designers can readily modify application software, integrate it back into the system, and expect it to work.  

"As long as you adhere to the standard software interfaces specified in the FACE Technical Standard, then changing the embedded application software to add capability to the system becomes straightforward," Woods said. "Any competent software engineer should be able to write an application that can talk to those interfaces, and that makes it possible to add in new capabilities quickly and easily."

Georgia Tech expects to be involved in tests that will demonstrate to the Navy the portability of capabilities using the FACE Technical Standard, he added.

The FACE Technical Standard takes advantage of the Portable Operating System Interface (POSIX), a group of open software standards aimed at making applications compatible with various operating systems. POSIX uses a uniform application programming interface (API), command line shells and utility interfaces that promote software compatibility among Unix, Linux and other Unix-like operating systems.

Georgia Tech has been working with the Navy FACE team for more than two years on the development of software code that provides an interface built to the FACE standard. Vanderbilt University, which is also involved in the effort, is creating a software developers' toolkit and conformance tools to be used with the FACE Technical Standard. 

"Our Georgia Tech/GTRI team has been successful in producing a FACE infrastructure prototype that is POSIX conformant and adheres fully to the standards developed by the FACE consortium," Riley said. "From a technical standpoint, this software can do the job that was assigned, which is to allow applications that conform to the FACE APIs to be interchangeable."

A contract that requires use of the FACE Technical Standard, Edition 1.0, in the Navy's C-130T aircraft has already been awarded, Woods said. The FACE Technical Standard, Edition 2.0, was recently released, and the FACE consortium is currently developing Edition 3.0 of the standard. 

The Navy's FACE team has been recognized with several awards, including two Naval Air Warfare Center, Aircraft Division (NAWCAD) Commander’s Awards, a NAWCAD Innovation Award, and the Defense Standardization Program Achievement Award.

"The FACE initiative represents a major step forward in rapidly integrating new capabilities for a variety of airborne defense systems," said Capt. Tracy Barkhimer, program manager for PMA-209. "The FACE initiative has benefited greatly from NAVAIR's partnership with Georgia Tech and Vanderbilt. They have brought a wealth of knowledge and experience that has been vital to the validation and rapid maturation of the FACE Technical Standard." 

Research News
Georgia Institute of Technology
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Media Relations Contacts: Lance Wallace (lance.wallace@gtri.gatech.edu)(404-407-7280) or John Toon (jtoon@gatech.edu)(404-894-6986).

Writer: Rick Robinson

Yet phased array antennas, which require bulky supporting electronics, can be as large as older systems. To address this issue, a research team from the Georgia Institute of Technology has developed a novel device – the ultra-compact passive true time delay.  This component could help reduce the size, complexity, power requirements and cost of phased array designs, and may have applications in other defense and communication areas as well. 

The patent-pending ultra-compact device takes advantage of the difference in speed between light and sound, explained Ryan Westafer, a Georgia Tech Research Institute (GTRI) research engineer who is leading the effort. The ultra-compact device uses acoustic technology to produce a type of signal delay that's essential to phased-array performance; existing phased-array antennas use cumbersome electrical technology to create this type of signal delay.

"Most true time delay equipment currently uses long, meandering electromagnetic delay lines – comparable to coaxial cable – that take up a lot of space," Westafer said. "In addition, there are some time delay designs that utilize photonic technology, but they currently have size and functionality drawbacks as well."

The ultra-compact delay device uses acoustic delay lines that are embedded entirely within thin film materials. The component can be made thousands of times smaller than an electrical delay-line design, Westafer said, and it can be readily integrated on top of semiconductor substrates commonly used in radar systems.

A Critical Delay

In a phased array radar system, true time delays are necessary to assure proper performance of the many signal beam producing elements that make up the array. As the elements scan back and forth electronically at extremely high speeds, their timing requires extremely fine coordination.

"The individual antenna elements of a phased array appear to scan together, but in fact each element’s signal has to leave up to a few nanoseconds later than its neighbor or the steered beam will be spoiled,” explained Kyle Davis, a GTRI research engineer who is a team member. "These delays need to march down each element in the array in succession for a steered beam to be produced. Without correct time delays, the signals will be degraded by a periodic interference pattern and the location of the target will be unclear."

Traditional phased array systems use one foot of electrical delay line for each nanosecond of delay. By contrast, the Georgia Tech team's time-delay design consists of a thin-film acoustic component that's a mere 40 microns square. The tiny device can be readily integrated into the silicon substrate of a radar component, yet it provides the same delay as many feet of cable. 

This size reduction is possible because of a simple fact of physics – sound traveling through the air moves about 100,000 times more slowly than light. As a result, when an electromagnetic wave such as a radar signal becomes an acoustic wave, it slows down dramatically. In the case of the ultra-compact passive true time delay component, the acoustic area of the component furnishes a multi-nanosecond delay in the space of a few microns.

"Microwave acoustic delay lines actually date back to 1959, but our ultra-compact delay's small size represents a significant advance that should allow microwave acoustic delay lines to be manufactured and integrated much more readily," explained William Hunt, a professor in the Georgia Tech School of Electrical and Computer Engineering. "And it's worth noting that this innovative work took place as the result of both strong student participation and very effective collaboration across several Georgia Tech units." 

Acoustic Wave Conversion

A phased array radar using the Georgia Tech time delay component could operate like this: An electromagnetic wave is transmitted through an electrical line to the compact time delay device. Then, within the delay device, a piezoelectric transducer converts electromagnetic waves to acoustic waves, and over the distance of a few microns the waves are slowed by several orders of magnitude.

Once the required delay is achieved, the acoustic waves are transduced back to electromagnetic waves, delivered into another electrical line and transmitted by an antenna. A similar but reverse sequence takes place when the radar beam bounces back from its target and is received by the antenna.

In addition to Westafer, Davis and Hunt, the Georgia Tech development team includes GTRI principal research engineers Jeff Hallman and Jim Maloney; GTRI research engineer Brent Tillery and GTRI research associate Chris Ward; School of Electrical and Computer Engineering student Stephen Mihalko, and GTRI student assistant Jonathan Perez.

To date, the Georgia Tech team has successfully demonstrated that the current version of the ultra-compact passive true time delay can handle radar signals at 100 percent bandwidth while delivering a 10 nanosecond delay. The team is presently addressing technical issues such as signal loss, and near-term plans call for the demonstration of an improved device design and the delivery of initial packaged devices to customers.

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Writer: Rick Robinson

A new study led by researchers at the Georgia Tech Research Institute (GTRI) provides details of the structure and tissue properties of the remora’s unique adhesion system. The researchers plan to use this information to create an engineered reversible adhesive inspired by the remora that could be used to create pain- and residue-free bandages, attach sensors to objects in aquatic or military reconnaissance environments, replace surgical clamps and help robots climb.

“While other creatures with unique adhesive properties – such as geckos, tree frogs and insects – have been the inspiration for laboratory-fabricated adhesives, the remora has been overlooked until now,” said GTRI senior research engineer Jason Nadler. “The remora’s attachment mechanism is quite different from other suction cup-based systems, fasteners or adhesives that can only attach to smooth surfaces or cannot be detached without damaging the host.”

The study results were presented at the Materials Research Society’s 2012 Fall Meeting and will be published in the meeting’s proceedings. The research was supported by the Georgia Research Alliance and GTRI.

The remora’s suction plate is a greatly evolved dorsal fin on top of the fish’s body. The fin is flattened into a disk-like pad and surrounded by a thick, fleshy lip of connective tissue that creates the seal between the remora and its host. The lip encloses rows of plate-like structures called lamellae, from which perpendicular rows of tooth-like structures called spinules emerge. The intricate skeletal structure enables efficient attachment to surfaces including sharks, sea turtles, whales and even boats.

To better understand how remoras attach to a host, Nadler and GTRI research scientist Allison Mercer teamed up with researchers from the Georgia Tech School of Biology and Woodruff School of Mechanical Engineering to investigate and quantitatively analyze the structure and form of the remora adhesion system, including its hierarchical nature.

Remora typically attach to larger marine animals for three reasons: transportation – a free ride that allows the remora to conserve energy; protection – being attacked when attached to a shark is unlikely; and food – sharks are very sloppy eaters, often leaving plenty of delectable morsels floating around for the remora to gobble up.

But whether this attachment was active or passive had been unclear. Results from the GTRI study suggest that remoras utilize a passive adhesion mechanism, meaning that the fish do not have to exert additional energy to maintain their attachment. The researchers suspect that drag forces created as the host swims actually increase the strength of the adhesion.

Dissection experiments showed that the remora’s attachment or release from a host could be controlled by muscles that raise or lower the lamellae. Dissection also revealed light-colored muscle tissue surrounding the suction disk, indicating low levels of myoglobin. For the remora to maintain active muscle control while attached to a marine host over long distances, the muscle tissue should display high concentrations of myoglobin, which were only seen in the much darker swimming muscles.

“We were very excited to discover that the adhesion is passive,” said Mercer. “We may be able to exploit and improve upon some of the adhesive properties of the fish to produce a synthetic material.”

The researchers also developed a technique that allowed them to collect thousands of measurements from three remora specimens, which yielded new insight into the shape, arrangement and spacing of their features. First, they imaged the remoras in attached and detached states using microtomography, optical microscopy and scanning electron microscopy. From the images, the researchers digitally reconstructed each specimen, measured characteristic features, and quantified structural similarities among specimens with significant size differences.

Detailed microtomography-based surface renderings of the lamellae showed a row of shorter, more regularly spaced and more densely packed spinules and another row of longer, less densely spaced spinules. A quantitative analysis uncovered similarities in suction disk structure with respect to the size and position of the lamellae and spinules despite significant specimen size differences. One of the fish’s disks was more than twice as long as the others, but the researchers observed a length-to-width ratio of each specimen’s adhesion disk that was within 16 percent of the average.

Through additional experiments, the researchers found that the spacing between the spinules on the remoras and the spacing between scales on mako sharks was remarkably similar.

“Complementary spacing between features on the remora and a shark likely contributes to the larger adhesive strength that has been observed when remoras are attached to shark skin compared to smoother surfaces,” said Mercer.

The researchers are planning to conduct further tests to better understand the roles of the various suction disk structural elements and their interactions to create a successful attachment and detachment system in the laboratory.

“We are not trying to replicate the exact remora adhesion structure that occurs in nature,” explained Nadler. “We would like to identify, characterize and harness its critical features to design and test attachment systems that enable those unique adhesive functions. Ultimately, we want to optimize a bio-inspired adhesive for a wide variety of applications that have capabilities and performance advantages over adhesives or fasteners available today.”

In addition to those already mentioned, the following researchers also contributed to this work: Georgia Tech mechanical engineering research engineer Angela Lin, professor Robert Guldberg and graduate student Michael Culler; Georgia Tech biology graduate student Ryan Bloomquist and associate professor Todd Streelman; GTRI research scientist Keri Ledford, and Georgia Aquarium Director of Research and Conservation Dr. Alistair Dove.

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Media Relations Contacts: John Toon (404-894-6986)(jtoon@gatech.edu) or Lance Wallace (404-407-7280)(lance.wallace@gtri.gatech.edu).

Writer: Abby Robinson

"Developing new sensor technologies that can be effectively employed from the air is a priority today given the rapidly increasing use of unmanned aircraft," said Michael Brinkmann, a GTRI principal research engineer who is leading the work. "Given suitable technology, small UAVs can perform complex, low-altitude missions effectively and at lower cost. The GAUSS system gives GTRI and its customers the ability to develop and test new airborne payloads in a rapid, cost effective way."

The current project includes development, installation and testing of a sensor suite relevant to many of GTRI’s customers. This suite consists of a camera package, a signals intelligence package for detecting and locating ground-based emitters, and a multi-channel ground-mapping radar.

The radar is being designed using phased-array antenna technology that enables electronic scanning. This approach is more flexible and agile than traditional mechanically steered antennas.

The combined sensor package is lightweight enough to be carried by the GAUSS UAV, which is a variant of the Griffon Outlaw ER aircraft and has a 13.6-foot wingspan and a payload capacity of approximately 40 pounds.     

The aircraft navigates using a high precision global positioning system (GPS) combined with an inertial navigation system. These help guide the UAV, which can be programmed for autonomous flight or piloted manually from the ground. The airborne mission package also includes multi-terabyte onboard data recording and a stabilized gimbal that isolates the camera from aircraft movement. 

Heavier sensor designs have several disadvantages, observed Mike Heiges, a principal research engineer who leads the GTRI team that is responsible for flying and maintaining the UAV platform. Larger sensors require larger unmanned aircraft to carry them, and those aircraft use bigger engines and must fly higher to avoid detection.

"Rather than have your design spiral upwards until you're using very large and expensive aircraft, smaller sensors allow the use of smaller aircraft," Heiges said.  "A smaller UAV saves money and is logistically easier to support. But most important, it can gather information closer to the tactical level on the ground, where it's arguably most valuable."

The GTRI team has developed a modular design that allows the GAUSS platform to be reconfigured for a number of sensor types. Among the possibilities for evaluation are devices that utilize light detection and ranging (LIDAR) technology and chemical-biological sensing technology.

"The overall concept for the GAUSS program is that the airplane itself will be simply a conveyance, and we can mount on it whatever sensor/communication package is required," said Brinkmann.

The radar package that GTRI is currently installing and testing is complex, he explained.  In addition to phased-array scanning capability, the radar operates in the X-band, is capable of five acquisition modes and can be programmed to transmit arbitrary waveforms.

"This radar is a very flexible system that will be able to do ground mapping, as well as detecting and tracking objects moving around on the ground," Brinkmann said. "These multiple sensing capabilities offer many possibilities for defense operations, along with search-and-rescue and disaster-recovery operations.”  

Possible applications include using the signals intelligence package to locate people buried in rubble by searching for cell phone signals, he said. In another scenario, a group of self-guided UAVs could be used to create an ad hoc cell phone network. That application could be potentially valuable in a post-disaster scenario where existing cell phone towers have been disabled, as happened after Hurricane Katrina, the Haiti earthquake and other events.

"The GAUSS platform is extremely helpful for proof-of-principle development and testing new concepts for airborne sensors," Brinkmann said. "It gives GTRI a convenient and flexible base from which to pursue significant research in a variety of disciplines."

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Media Relations Contacts: John Toon (404-894-6986)(jtoon@gatech.edu) or Lance Wallace (404-407-7280)(lance.wallace@gtri.gatech.edu).

Writer: Rick Robinson

Headquartered in Finland, Beneq’s North American offices are located in Duluth, Georgia. Beneq thin film equipment is used for coatings in solar photovoltaics, flexible electronics, strengthened glass and other emerging thin film applications. Beneq has introduced several revolutionary innovations within its coating technologies, including roll-to-roll atomic layer deposition (ALD) and high-yield atmospheric aerosol coating (nAERO®).

When asked about joining the program, Mr. Jukka Kohtala, Area Sales Director of Beneq states, “Joining the COPE is a natural step for Beneq, as we have for some time now been involved in developing the future coating equipment and applications for flexible and organic electronics, both on a purely R&D level and together with customers with real products. Especially our Roll-to-Roll approach is one that surely will interest the members and clientele of COPE."

As a member of the program, Beneq will connect to the faculty expertise and highly trained student and graduates of the Center as well as an international network of partners in the field of organic photonics and electronics.  This includes information on the latest research and discoveries and invitations to exclusive events.

Mr. Kohtala adds, “We are an innovative company with a unique coating technology, ready to accommodate partner and customer challenges, develop solutions and create new business. Organic electronics is a main focus area for us, and we know we have a lot to bring to COPE."

Prof. Bernard Kippelen, Director of the Center stated, “Partnerships with leading equipment manufacturers like Beneq are important to contribute to the future growth of the organic photonics and electronics industry. We are pleased to have Beneq as part of our network and are looking forward to productive interactions.” 

Known as an analog beam-former, the GTRI device is part of the radiometer, which is being tested by NASA on a Global Hawk unmanned aerial vehicle. The radiometer measures microwave radiation emitted by the sea foam that is produced when high winds blow across ocean waves. By measuring the electromagnetic radiation, scientists can remotely assess surface wind speeds at multiple locations within the hurricanes.

HIRAD could provide detailed information about the wind speeds and rain intensity inside hurricanes without the need to fly manned aircraft through the storms. In addition to the beam-former design, GTRI researchers also provided assistance to NASA with improvements aimed at a potential future, more advanced version of the radiometer.

“Improved knowledge of the wind speed field will enable the National Hurricane Center to better characterize the storm’s intensity,” explained Timothy Miller, Research and Analysis Team Lead for the Earth Science Office at the NASA Marshall Space Flight Center. “Better forecasts of storm intensity and structure will enable better warnings of such important factors as wind strength and storm surge. That would allow businesses and residents to prepare with more confidence in their knowledge of what is coming.”

HIRAD was flown above two hurricanes in 2010 and a Pacific frontal system in 2012. Data it gathered on wind and rain will be provided to the scientific community for use in numerical modeling, and could also guide development of a next-generation system that would provide information on wind direction in addition to measuring wind speed and rain intensity.

“We have verified the instrument concept in terms of sensitivity to wind speed and rain rate,” Miller said. “We have also learned a lot about the factors that need to be considered in developing calibrated images from the flight data. That work is still ongoing.”

GTRI researchers supported development of the radiometer with design of the beam-formers, which are part of the radiometer’s array antenna. The array antenna gathers microwave signals from the ocean and the GTRI-designed devices – several of which are required – form “fan” beams of electromagnetic energy across the ground path of the aircraft’s travel. The resulting signals are then fed into sensitive receivers developed by researchers at the University of Michigan and ProSensing, Inc., a Massachusetts company.

“There are different ways to build antennas to solve this problem, but array antennas provide multi-channel capability and greater sensitivity,” said Glenn Hopkins, a research engineer who headed up the GTRI design work. “Because this system is passive – it doesn’t send out radiation – we need to have maximum sensitivity and a focus on minimizing noise in the system.”

The HIRAD system, also known technically as a microwave synthetic aperture radiometer, is designed to operate in the microwave spectrum, from about 4 gigahertz to 7 gigahertz. Discrete parts of that range are used to enable discrimination between ocean surface emission and that from the rain located between the instrument and the surface.

“On the aircraft, the instrument would be flying a track over the storm, with a multitude of simultaneous beams,” explained Hopkins. “We would be pixelating the surface and could determine what radiation is coming from each area to generate a map of the intensity of the wind speeds as we fly over the storm.”

Beyond supporting the radiometer’s need for high sensitivity and low noise, the component also had to be as small and light as possible to be part of the Global Hawk payload. The GTRI design was manufactured by an outside company, and integrated directly onto the back of the instrument’s antenna. The circuitry is just 20 one-thousandths of an inch thick, printed on flexible circuit materials.

“This project is an example of the kinds of work we have been doing for the Department of Defense, and we’re pleased that this technology can be transitioned to assist with weather prediction and research,” Hopkins said.

As part of a small business innovation research (SBIR) project with Spectral Research, Inc., GTRI researchers also participated in an effort to increase the capability of the HIRAD array by designing a dual polarized array to replace the single polarized array that is part of the existing test system. The dual polarized array operates at the same 4 to 7 gigahertz range as the single polarized array, but provides both polarization channels in the same area.

The dual polarized design exploited fragmented antenna technology developed at GTRI to support this broad range of frequencies.

“One key challenge in the array study was to use the same footprint as the single polarization array,” said Jim Maloney, a GTRI principal research engineer. “Prototype dual polarization arrays were built and measured to confirm the ability of GTRI’s fragmented antenna technology to meet the bandwidth and form factor requirements.”

The Global Hawk can fly at altitudes of more than 60,000 feet, and can stay in the air for as long as 31 hours, allowing it to remain in the hurricane area as much as four times longer than piloted aircraft now used for monitoring hurricanes. It provides data that is more detailed than what satellites could provide.

“A UAV is able to stay over the storm for much longer,” Miller noted. “Compared to a satellite, the UAV observations are of much higher spatial resolution, and depending on the satellite’s orbit, generally of a much longer time period. A satellite instrument would be able to observe storms continually, over a much larger area, but would provide much coarser spatial resolution.”

Development of HIRAD was supported by NASA and the National Oceanic and Atmospheric Administration (NOAA). The project involved partnerships among NASA’s Marshall Space Flight Center, NOAA’s Unmanned Aerial Systems Program, the University of Michigan, the University of Central Florida and NOAA’s Hurricane Research Division.

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Writer: John Toon

NextInput has developed force and pressure sensitive touch technologies based on MEMS sensors, an innovative new way of interacting with electronic devices. Their patent-pending technology provides a tactile, force or pressure sensitive method of interfacing with virtually any electronic device.

When asked about joining the program, Don Metzger, CEO of NextInput stated, “It represents an important step in NextInput’s mission to deliver the next generation of touch interfaces to the marketplace. Our research here is defining methods of human-machine interaction that have never been seen before.”

As a member of the program, NextInput will connect to the faculty expertise and highly trained student and graduates of the Center as well as an international network of partners in the field of organic photonics and electronics.  This includes information on the latest research and discoveries and invitations to exclusive events.

“We are delighted to participate in the COPE program at Georgia Tech,” added Don. “NextInput has a Georgia Tech heritage, and our team is very excited to explore groundbreaking organic-film based technologies with COPE’s team of faculty and scientists.”

Bernard Kippelen, Director of the Center stated, “The disruptive technologies that we invent within COPE in the area of printed electronics are a perfect fit for the new products and solutions that NextInput is developing. Transitioning our technology into technology companies is part of COPE’s mission and we are delighted to enter into this new partnership with NextInput.”

The observed frequency and intensity of blackbody radiation is affected by interaction between temperature, humidity, distance from the radiating object and other parameters. Traditional textbooks rely on a series of charts to show how these variables affect the emissions, making the concept potentially difficult to understand.

Researchers have now created an iPad application that illustrates the relationship between these parameters, allowing students to explore the interactions and visually determine the impacts of changes. Known as iBlackbody, the application was originally produced as part of a handbook for electro-optical engineers, who must understand the impact of blackbody radiation in their defense and atmospheric sensing research. The program has since been made available to educators and students.

“We have built a tool that allows users to experiment with these parameters to see how the blackbody curve changes based on temperature, humidity, haze conditions, distance and other factors,” said Leanne West, a principal research scientist at GTRI. “The program puts the equations into action so you can see the results from changing variables.”

Using sliders on the screen, users can change the parameters in discrete values that are programmed into the application. For instance, the application allows users to see the impact of temperatures as low as minus 333 degrees Fahrenheit, and as high as 10,340 degrees Fahrenheit.

Available in the iTunes store, iBlackbody is the first iPad application to illustrate the concept of blackbody radiation. It is part of a series of programs and games that GTRI scientists and K-12 education specialists are developing to illustrate science and technology topics that can be difficult to understand using traditional teaching methods.

“We think this is a much better learning tool for anyone attempting to understand blackbody radiation,” said West, a former high school physics and physical sciences teacher. “Using the iPad can really help to bring concepts to life for students and anyone else interested in this topic. Seeing how equations change as input variables change aids in the understanding of the equation and what it is trying to tell you.”

Funds generated by the sale of the app – which is available for 99 cents – will go back into improving it and building other iPad programs, West added. The app was written primarily by Brian Parise, a GTRI research scientist.

The project was supported by SENSIAC, the military sensing organization based at Georgia Tech. The iBlackbody application was originally produced as part of a project converting a traditional handbook on infrared radiation into an electronic book. The application replaces text and a series of charts in the first chapter of the handbook.

“People enjoyed using this application and they saw its potential beyond the handbook,” said West. “What was meant to be just a module within the e-book turned into its own iTunes application.”

Blackbody radiation has a characteristic and continuous frequency spectrum that depends on the temperature of the object emitting it, a phenomenon described mathematically by Planck’s radiation law. The spectrum shifts to higher frequencies as the temperature of the object increases. At room temperature, most of the emissions from a blackbody are in the infrared region, which is not visible to the human eye, which is why the object appears to be black. At higher temperatures, blackbodies can produce visible emissions that range in color from red to blue-white.

A blackbody absorbs all of the electromagnetic energy that it encounters, and then emits it back into the environment. When a blackbody is at a uniform temperature, its emissions have a characteristic frequency distribution that depends on the temperature.

For the future, West hopes to produce other iPad applications, as well as games, intended to teach physics principles.

“Tablet computers are becoming important teaching tools that are playing a larger and larger role in education,” she added. “We want to contribute to future generations understanding the science and engineering concepts that are important to the research we do.”

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Writer: John Toon

As a member of the program, Boeing will connect to the faculty expertise and highly trained students and graduates of the center as well as an international network of partners in the field of organic photonics and electronics. This includes information on the latest research and discoveries and invitations to exclusive events.

“We’ve joined this center to have access to the state of the art conductive and electro-active technology base that has been assembled at Georgia Tech,” said Patrick Kinlen of Boeing Research & Technology Materials, Processes & Structures Technologies. “This technology has impact for Boeing in the area of conductive coatings, photovoltaics, electrochromics and energy storage.”

“COPE is extremely pleased to count Boeing among its industrial affiliates,” said Bernard Kippelen, Georgia Tech director of the center. “Having a company with a long tradition of aerospace leadership and innovation like The Boeing Company join our center speaks for the strong potential that COPE’s technological innovations can have in the future of commercial jetliners, and in defense, space and security applications.”     

Boeing is the world’s largest aerospace company and leading manufacturer of commercial jetliners and defense, space and security systems. A top U.S. exporter, the company supports airlines and U.S. and allied government customers in 150 countries. Boeing products and tailored services include commercial and military aircraft, satellites, weapons, electronic and defense systems, launch systems, advanced information and communications systems, and performance-based logistics and training.

Boeing Research & Technology is the advanced, central research and development organization of Boeing. It provides innovative technologies that enable the development of future aerospace solutions while improving the cycle time, cost, quality and performance of current aerospace products and services.