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  <title><![CDATA[Ph.D Thesis Proposal by Brian Railing]]></title>
  <body><![CDATA[<p><strong>Brian P Railing</strong><br />School of Computer Science<br />College of Computing<br />Georgia Institute of Technology<br /><br />Date: February 13th, 2015 (Friday)<br />Time: 3:00 PM - 5:00 PM<br />Location: &nbsp;KACB 3100<br /><br />Committee Chair:<br />Prof. Thomas M. Conte<br /><br />Committee Members:<br />Prof. Santosh Pande<br />Prof. Richard Vuduc<br />Prof. Sudhakar Yalamanchili</p>&nbsp;<strong>Title: Characterization and Classification of Parallel Programs</strong><br /><br /><p><strong>Abstract:</strong></p><p>&nbsp; Computer architecture has looming challenges with finding program parallelism, process technology limits, and the limited power budget.&nbsp; To navigate these challenges, a deeper understanding of parallel programs is required.&nbsp; I will discuss the task graph representation and how it enables programmers and compiler optimizations to understand and exploit dynamic aspects of the program.&nbsp;</p><p>&nbsp; I will present Contech, which is a high performance framework for generating dynamic task graphs from arbitrary parallel programs.&nbsp; The Contech framework supports a variety of languages and parallelization libraries, and has been tested on both x86 and ARM.&nbsp; I will demonstrate how this framework encompasses a diversity of program analyses.<br />&nbsp; This proposal will present four approaches to classifying and understanding parallel programs.&nbsp; The approaches classify the parallelism expressed by the program, the communication of the program, and architectural resources required by the program.&nbsp; Each approach can provide different insights into parallel programs, which can be leveraged by computer architecture, compilers, or programmers.&nbsp; This proposal will also explore possible future applications of the insights.</p>]]></body>
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