Title:  High-speed Channels Analysis and Design using Polynomial Chaos Theory and Machine Learning

Committee:

Dr. Madhavan Swaminathan, ECE, Chair , Advisor

Dr. Sung-Kyu Lim, ECE

Dr. Saibal Mukhopadhyay, ECE

Dr. Arijit Raychowdhury, ECE

Dr. Duen Horng Chau, CSE

Dr. Suresh Sitaraman, ME

Abstract: With the exponential increase in the data rate of high-speed serial channels, their efficient and accurate analysis and design has become of great importance. Conventional methods for analysis and design of these components can be prohibitively time consuming. Therefore, in this work we introduce two novel approaches for efficient eye analysis of high-speed channels. These methods are focused on the data dependent jitter and noise, and the intersymbol interference. In the first approach, a complete surrogate model of the channel is trained using a short transient simulation, based on the Polynomial Chaos theory. This method provides distribution of jitter, the full eye diagram, and other statistics of the received signal. The second analysis method is for faster eye analysis when we are interested in finding the worst-case eye width, eye height, and inner eye opening. It finds the data patterns resulting in the worst signal integrity; hence in the closest eye. This method is based on the Bayesian optimization. The final portion of this work is dedicated to design of high-speed channels with machine learning. The proposed design approach focuses on inverse design of CTLE, where a desired eye height and eye width are given, and the algorithm finds the corresponding DC gain and peaking of CTLE. This approach is based on the invertible neural networks. The numerical examples show up to 11.5X speedup for direct estimation of the jitter distribution using the PC surrogate model approach. In addition, up to 23X speedup using the worst-case eye analysis approach is achieved, and the inverse design of CTLE shows promising results.