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Ph.D. Proposal Oral Exam - Paul Jo
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Title: POLYLITHIC INTEGRATION OF HETEROGENEOUS MULTI-DIE ENABLED BY COMPLIANT MICROINTERCONNECTS
Committee:
Dr. Bakir, Advisor
Dr. Krishna, Chair
Dr. Brand
Abstract:
The objectives of this research are to propose and demonstrate 1) a new compliant interconnect that can provide cost-effective and simple fabrication process and allow high-degree of freedom in design and 2) advanced heterogeneous multi-die integration platform enabled by the new compliant interconnect. Interconnects play a critical role in virtually all microelectronic applications. They are key in influencing microsystem form factor, electrical performance, power consumption, and signal integrity. Of particular importance are first-level interconnects, which are used to electrically interconnect and mechanically bond a die to a package substrate. The density, electrical attributes, and mechanical properties of first-level interconnects impact the overall mechanical integrity, signaling bandwidth density, and power supply noise of microsystems. While solder bumps have become a key technology for first-level interconnects, the technology unfortunately leaves a number of attributes desired in modern microsystems. Compliant interconnects can circumvent many of the challenges in solder bumps as they can compensate for surface non-uniformity on the attaching substrate and CTE mismatch induced warpage and provide non-permanent contact. To this end, novel compliant interconnects for emerging electronic devices and new heterogeneous multi-die integration platform enabled by the compliant interconnects are explored.
Status
- Workflow Status:Published
- Created By:Daniela Staiculescu
- Created:11/26/2018
- Modified By:Daniela Staiculescu
- Modified:11/26/2018
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