Title:  Towards a Universal Hot Carrier Degradation Model for SiGe HBTs Subjected to Electrical Stress

Committee: 

Dr. Cressler, Advisor    

Dr. Khan, Chair

Dr. Shen

Abstract:

The objective of this research is to develop a universal hot carrier degradation model with push-button reliability prediction for complementary SiGe HBTs (NPN + PNP). The model considers the cumulative effects of multiple hot carrier sources (Impact-Ionization and Auger generation) and degradation mechanisms, including polysilicon resistance degradation, high injection current gain enhancement, and oxide interface damage across time, temperature, and multiple electrical biasing schemes (high voltage and high current). The changes to current gain and base resistance in critical devices affect the performance (gain, speed, impedance mismatch, current mirror ratios and device breakdown) and set the functional lifetime limits in RF and high speed mixed-signal circuits. Being able to simulate the aging of a complex circuit with SiGe HBTs swinging dynamically on the output plane using this physics-based model is invaluable for any circuit designer optimizing for high performance and reliability.