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Ph.D. Dissertation Defense - Karthik Rao

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TitleCoordinated Management of the Processor and Memory for Optimizing Energy Efficiency

Committee:

Dr. Yorai Wardi, ECE, Chair , Advisor

Dr. Sudhakar Yalamanchili, ECE, Co-Advisor

Dr. Magnus Egerstedt, ECE

Dr. Saibal Mukhopadhyay, ECE

Dr. Joseph Greathouse, AMD

Dr. Santosh Pande, CoC

Abstract:

Energy efficiency is a key design goal for future computing systems. With diverse components interacting with each other on the System-on-Chip (SoC), dynamically managing performance, energy and temperature is a challenge in 2D architectures and more so in a 3D stacked environment. In addition, temperature has emerged as the parameter of primary concern. Heuristics based schemes have been employed so far to address these issues. Looking ahead into the future, complex multiphysics interactions between performance, energy and temperature reveal the limitations of such approaches. Therefore in this thesis, first, a comprehensive characterization of existing methods is carried out to identify causes for their inefficiency. Managing different components in an independent and isolated fashion using heuristics is seen to be the primary drawback. Following this, techniques based on feedback control theory to optimize energy efficiency of the processor and memory in a coordinated fashion are developed. They are evaluated on a real physical system and a cycle-level simulator demonstrating significant improvements over prior schemes. The two main messages of this thesis are, (i) coordination between multiple components is paramount for next generation computing systems and (ii) temperature ought to be treated as a resource like compute or memory cycles.

Status

  • Workflow Status:Published
  • Created By:Daniela Staiculescu
  • Created:04/26/2018
  • Modified By:Daniela Staiculescu
  • Modified:04/26/2018

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