Meet academic and industry leaders for intimate discussions about new cyber threats, trends and technologies.

The Cybersecurity Lecture Series is a free, open-to-the-public lecture from a thought leader who is advancing the field of information security and privacy. Invited speakers include executives and researchers from private companies, government agencies, start-up incubators as well as Georgia Tech faculty and students presenting their research.

Held weekly each Friday at Noon through Apr. 21, lectures are open to all -- students, faculty, industry, government, or simply the curious. Graduate students may register for credit under seminar course CS-8001-INF.

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Featuring Jim Plusquellic on April 21, 2017

Dr. James (Jim) Plusquellic is professor of electrical and computer engineering at the University of New Mexico, co-founder of the International Symposium on Hardware-Oriented Security and Trust (HOST), and director of the Integrated Circuit Hardware Analysis Laboratory (IC-HAL).

RSVP

Hardware-Based Security and Trust For IoT and Supply Chain Authentication

ABSTRACT    |    New hardware architectures for Internet-of-Things (IoT) are emerging rapidly in response to consumer demands for improved situational awareness, instant access to widely distributed sources of news and information and remote, hand-held control over their personal assets.  The most important component of IoT relates to authentication, i.e., confirming the identities of communicating entities, but weak 'password' forms of authentication continue to dominate the IoT landscape. This presentation discusses the challenges associated with authentication in IoT environments and emerging hardware-based solutions based on physical unclonable functions (PUFs). PUFs are capable of generating unique identifiers for each chip by leveraging small performance differences introduced by manufacturing process variations. PUFs are particularly attractive for IoT because they are lightweight, eliminate the need for secure non-volatile memory, and for a special class of so-called strong PUFs, are able to generate virtually an unlimited number of unique, reproducible bitstrings. I will describe recent results and carry out a hardware demonstration of a Hardware-Embedded delay PUF called HELP using a set Xilinx SoC chips.

BIO    |    Dr. Jim Plusquellic is a professor of electrical and computer engineering at the University of New Mexico, chief technology officer for Enthentica Inc., and president and chief executive officer for Trusted and Secure Systems. His research interests are in the area of nano-scale VLSI and include security and trust in IC hardware, embedded system design, supply chain and IoT security and trust, silicon validation, design for manufacturability and delay test methods.

Dr. Plusquellic received an "Outstanding Contribution Award" from IEEE Computer Society in 2012 for co-founding and for his contributions to the Symposium on Hardware-Oriented Security and Trust (HOST). He served as General Chair for HOST in 2010, for the Defect-Based Testing Workshop in 2006 and as Associate Editor for Transactions on Computers. He received the "10 Years of Continuous Service Award" from the International Test Conference, a Best Paper Award from VTS, an ACM Distinguished Service Award from SIGDA and two Austin CAS Fellow Awards from IBM. He received the "Albuquerque lab-to-business accelerator" award in 2016, the "2014 Innovation Award" from the Science and Technology Center at the University of New Mexico, was a "Featured Entrepreneur" within the School of Engineering and has multiple patents and provisional applications filed with the US. Patent and Trademark Office. Professor Plusquellic is serving or has served on the Program Committees for HOST, Design and Test in Europe, International Test Conference, International Conference on Computer-Aided Design and VLSI Test Symposium.

He received both his M.S. and Ph.D. degrees in computer science from the University of Pittsburgh in 1995 and 1997, respectively, and has published more than 70 refereed conference and journal papers. He is a Golden Core Member of the IEEE Computer Society and a member of the IEEE.