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Ph.D. Proposal Oral Exam - Monodeep Kar

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Title:  Enhancing Side Channel Security with Fully Intergrated Inductive Voltage Regulators

Committee: 

Dr. Mukhopadhyay, Advisor 

Dr. Raychowdhury, Chair

Dr. Beyah

Abstract: The objective of the proposed research is to design and analyze the role of fully integrated inductive voltage regulators (FIVR) to enhance the side channel attack (SCA) resistance of encryption engines. FIVRs are crucial for improving energy-efficiency of digital cores, however have never been explored for SCA protection. Exploiting various transformations through a FIVR for improving robustness to SCA incurs negligible overhead in area and power and performance. To that end, the thesis addresses the following topics. An all-digital architecture of a FIVR, suitable for implementation in digital process nodes, with a light-weight auto-tuning scheme, an improved transient response and low-load power efficiency is proposed. Characterization of various transformations through a FIVR on the SCA signatures has been provided. A security aware FIVR design methodology through the use of different power stage and controller parameters as control knobs and trade-off between baseline FIVR performance metrics and SCA resistance have been explored. A prototype test-chip has been fabricated and measured to demonstrate the effectiveness of FIVR and validate the effects of various transformations along with novel circuits to further boost robustness to SCA. The research progress to date demonstrates protection against power SCA and remaining work will focus on analyzing protection against electromagnetic SCA.

Status

  • Workflow Status:Published
  • Created By:Daniela Staiculescu
  • Created:12/05/2016
  • Modified By:Daniela Staiculescu
  • Modified:12/05/2016

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