Title:  Design and Demonstration of a 2.5D Glass Interposer Package to Achieve 1Tb/s Bandwidth for High Performance Applications

Committee: 

Dr. Tummala, Advisor   

Dr. Peterson, Chair

Dr. Sitaraman

Dr. Sundaram

Abstract:

The objective of the proposed research is to design and demonstrate, for the first time, a panel-based 2.5-D glass interposer package to achieve terabit per second bandwidth for high performance computing. The 2.5-D glass interposer package approach demonstrated in this thesis offers the best combination of bandwidth per unit power, high speed I/O, and panel-based processing for low cost to address the challenges associated with 2.5-D silicon and organic interposers. The low dielectric loss tangent of glass improves signal integrity compared to silicon. Smooth surface finish and low total thickness variation of glass enables interconnect line width down to 2 μm across panel. The high modulus and dimensional stability of glass increases interconnect density comparable to silicon by scaling microvia padstack and pitch. A tailorable coefficient of thermal expansion dependent on glass composition facilitates direct attachment of the interposer to the board to reduce layer count and cost, while maintaining chip-level interconnect (CLI) reliability. Therefore, the material properties of glass enable an optimized advanced packaging solution for high performance applications with high interconnect density at short electrical length, low signal power, direct attachment to board with high reliability, and low cost. Fundamental challenges that need to be addressed to enable such high bandwidth glass interposer packages are several, and this thesis addresses two major electrical design challenges including: (1) high-density RDL interconnections between multiple ICs on the glass interposer and (2) high-speed channels on glass substrates for external I/O at 28 Gbps and beyond.